1 /*
2 * TI DaVinci EVM board support
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/platform_device.h>
15 #include <linux/gpio.h>
16 #include <linux/i2c.h>
17 #include <linux/i2c/pcf857x.h>
18 #include <linux/i2c/at24.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/nand.h>
21 #include <linux/mtd/partitions.h>
22 #include <linux/mtd/physmap.h>
23 #include <linux/phy.h>
24 #include <linux/clk.h>
25 #include <linux/videodev2.h>
26 #include <linux/export.h>
27
28 #include <media/tvp514x.h>
29
30 #include <asm/mach-types.h>
31 #include <asm/mach/arch.h>
32
33 #include <mach/dm644x.h>
34 #include <mach/common.h>
35 #include <mach/i2c.h>
36 #include <mach/serial.h>
37 #include <mach/mux.h>
38 #include <mach/nand.h>
39 #include <mach/mmc.h>
40 #include <mach/usb.h>
41 #include <mach/aemif.h>
42
43 #define DM644X_EVM_PHY_ID "davinci_mdio-0:01"
44 #define LXT971_PHY_ID (0x001378e2)
45 #define LXT971_PHY_MASK (0xfffffff0)
46
47 static struct mtd_partition davinci_evm_norflash_partitions[] = {
48 /* bootloader (UBL, U-Boot, etc) in first 5 sectors */
49 {
50 .name = "bootloader",
51 .offset = 0,
52 .size = 5 * SZ_64K,
53 .mask_flags = MTD_WRITEABLE, /* force read-only */
54 },
55 /* bootloader params in the next 1 sectors */
56 {
57 .name = "params",
58 .offset = MTDPART_OFS_APPEND,
59 .size = SZ_64K,
60 .mask_flags = 0,
61 },
62 /* kernel */
63 {
64 .name = "kernel",
65 .offset = MTDPART_OFS_APPEND,
66 .size = SZ_2M,
67 .mask_flags = 0
68 },
69 /* file system */
70 {
71 .name = "filesystem",
72 .offset = MTDPART_OFS_APPEND,
73 .size = MTDPART_SIZ_FULL,
74 .mask_flags = 0
75 }
76 };
77
78 static struct physmap_flash_data davinci_evm_norflash_data = {
79 .width = 2,
80 .parts = davinci_evm_norflash_partitions,
81 .nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),
82 };
83
84 /* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
85 * limits addresses to 16M, so using addresses past 16M will wrap */
86 static struct resource davinci_evm_norflash_resource = {
87 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
88 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
89 .flags = IORESOURCE_MEM,
90 };
91
92 static struct platform_device davinci_evm_norflash_device = {
93 .name = "physmap-flash",
94 .id = 0,
95 .dev = {
96 .platform_data = &davinci_evm_norflash_data,
97 },
98 .num_resources = 1,
99 .resource = &davinci_evm_norflash_resource,
100 };
101
102 /* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
103 * It may used instead of the (default) NOR chip to boot, using TI's
104 * tools to install the secondary boot loader (UBL) and U-Boot.
105 */
106 static struct mtd_partition davinci_evm_nandflash_partition[] = {
107 /* Bootloader layout depends on whose u-boot is installed, but we
108 * can hide all the details.
109 * - block 0 for u-boot environment ... in mainline u-boot
110 * - block 1 for UBL (plus up to four backup copies in blocks 2..5)
111 * - blocks 6...? for u-boot
112 * - blocks 16..23 for u-boot environment ... in TI's u-boot
113 */
114 {
115 .name = "bootloader",
116 .offset = 0,
117 .size = SZ_256K + SZ_128K,
118 .mask_flags = MTD_WRITEABLE, /* force read-only */
119 },
120 /* Kernel */
121 {
122 .name = "kernel",
123 .offset = MTDPART_OFS_APPEND,
124 .size = SZ_4M,
125 .mask_flags = 0,
126 },
127 /* File system (older GIT kernels started this on the 5MB mark) */
128 {
129 .name = "filesystem",
130 .offset = MTDPART_OFS_APPEND,
131 .size = MTDPART_SIZ_FULL,
132 .mask_flags = 0,
133 }
134 /* A few blocks at end hold a flash BBT ... created by TI's CCS
135 * using flashwriter_nand.out, but ignored by TI's versions of
136 * Linux and u-boot. We boot faster by using them.
137 */
138 };
139
140 static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
141 .wsetup = 20,
142 .wstrobe = 40,
143 .whold = 20,
144 .rsetup = 10,
145 .rstrobe = 40,
146 .rhold = 10,
147 .ta = 40,
148 };
149
150 static struct davinci_nand_pdata davinci_evm_nandflash_data = {
151 .parts = davinci_evm_nandflash_partition,
152 .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
153 .ecc_mode = NAND_ECC_HW,
154 .bbt_options = NAND_BBT_USE_FLASH,
155 .timing = &davinci_evm_nandflash_timing,
156 };
157
158 static struct resource davinci_evm_nandflash_resource[] = {
159 {
160 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
161 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
162 .flags = IORESOURCE_MEM,
163 }, {
164 .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
165 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
166 .flags = IORESOURCE_MEM,
167 },
168 };
169
170 static struct platform_device davinci_evm_nandflash_device = {
171 .name = "davinci_nand",
172 .id = 0,
173 .dev = {
174 .platform_data = &davinci_evm_nandflash_data,
175 },
176 .num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
177 .resource = davinci_evm_nandflash_resource,
178 };
179
180 static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
181
182 static struct platform_device davinci_fb_device = {
183 .name = "davincifb",
184 .id = -1,
185 .dev = {
186 .dma_mask = &davinci_fb_dma_mask,
187 .coherent_dma_mask = DMA_BIT_MASK(32),
188 },
189 .num_resources = 0,
190 };
191
192 static struct tvp514x_platform_data tvp5146_pdata = {
193 .clk_polarity = 0,
194 .hs_polarity = 1,
195 .vs_polarity = 1
196 };
197
198 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
199 /* Inputs available at the TVP5146 */
200 static struct v4l2_input tvp5146_inputs[] = {
201 {
202 .index = 0,
203 .name = "Composite",
204 .type = V4L2_INPUT_TYPE_CAMERA,
205 .std = TVP514X_STD_ALL,
206 },
207 {
208 .index = 1,
209 .name = "S-Video",
210 .type = V4L2_INPUT_TYPE_CAMERA,
211 .std = TVP514X_STD_ALL,
212 },
213 };
214
215 /*
216 * this is the route info for connecting each input to decoder
217 * ouput that goes to vpfe. There is a one to one correspondence
218 * with tvp5146_inputs
219 */
220 static struct vpfe_route tvp5146_routes[] = {
221 {
222 .input = INPUT_CVBS_VI2B,
223 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
224 },
225 {
226 .input = INPUT_SVIDEO_VI2C_VI1C,
227 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
228 },
229 };
230
231 static struct vpfe_subdev_info vpfe_sub_devs[] = {
232 {
233 .name = "tvp5146",
234 .grp_id = 0,
235 .num_inputs = ARRAY_SIZE(tvp5146_inputs),
236 .inputs = tvp5146_inputs,
237 .routes = tvp5146_routes,
238 .can_route = 1,
239 .ccdc_if_params = {
240 .if_type = VPFE_BT656,
241 .hdpol = VPFE_PINPOL_POSITIVE,
242 .vdpol = VPFE_PINPOL_POSITIVE,
243 },
244 .board_info = {
245 I2C_BOARD_INFO("tvp5146", 0x5d),
246 .platform_data = &tvp5146_pdata,
247 },
248 },
249 };
250
251 static struct vpfe_config vpfe_cfg = {
252 .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
253 .i2c_adapter_id = 1,
254 .sub_devs = vpfe_sub_devs,
255 .card_name = "DM6446 EVM",
256 .ccdc = "DM6446 CCDC",
257 };
258
259 static struct platform_device rtc_dev = {
260 .name = "rtc_davinci_evm",
261 .id = -1,
262 };
263
264 static struct snd_platform_data dm644x_evm_snd_data;
265
266 /*----------------------------------------------------------------------*/
267
268 /*
269 * I2C GPIO expanders
270 */
271
272 #define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
273
274
275 /* U2 -- LEDs */
276
277 static struct gpio_led evm_leds[] = {
278 { .name = "DS8", .active_low = 1,
279 .default_trigger = "heartbeat", },
280 { .name = "DS7", .active_low = 1, },
281 { .name = "DS6", .active_low = 1, },
282 { .name = "DS5", .active_low = 1, },
283 { .name = "DS4", .active_low = 1, },
284 { .name = "DS3", .active_low = 1, },
285 { .name = "DS2", .active_low = 1,
286 .default_trigger = "mmc0", },
287 { .name = "DS1", .active_low = 1,
288 .default_trigger = "ide-disk", },
289 };
290
291 static const struct gpio_led_platform_data evm_led_data = {
292 .num_leds = ARRAY_SIZE(evm_leds),
293 .leds = evm_leds,
294 };
295
296 static struct platform_device *evm_led_dev;
297
298 static int
evm_led_setup(struct i2c_client * client,int gpio,unsigned ngpio,void * c)299 evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
300 {
301 struct gpio_led *leds = evm_leds;
302 int status;
303
304 while (ngpio--) {
305 leds->gpio = gpio++;
306 leds++;
307 }
308
309 /* what an extremely annoying way to be forced to handle
310 * device unregistration ...
311 */
312 evm_led_dev = platform_device_alloc("leds-gpio", 0);
313 platform_device_add_data(evm_led_dev,
314 &evm_led_data, sizeof evm_led_data);
315
316 evm_led_dev->dev.parent = &client->dev;
317 status = platform_device_add(evm_led_dev);
318 if (status < 0) {
319 platform_device_put(evm_led_dev);
320 evm_led_dev = NULL;
321 }
322 return status;
323 }
324
325 static int
evm_led_teardown(struct i2c_client * client,int gpio,unsigned ngpio,void * c)326 evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
327 {
328 if (evm_led_dev) {
329 platform_device_unregister(evm_led_dev);
330 evm_led_dev = NULL;
331 }
332 return 0;
333 }
334
335 static struct pcf857x_platform_data pcf_data_u2 = {
336 .gpio_base = PCF_Uxx_BASE(0),
337 .setup = evm_led_setup,
338 .teardown = evm_led_teardown,
339 };
340
341
342 /* U18 - A/V clock generator and user switch */
343
344 static int sw_gpio;
345
346 static ssize_t
sw_show(struct device * d,struct device_attribute * a,char * buf)347 sw_show(struct device *d, struct device_attribute *a, char *buf)
348 {
349 char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
350
351 strcpy(buf, s);
352 return strlen(s);
353 }
354
355 static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
356
357 static int
evm_u18_setup(struct i2c_client * client,int gpio,unsigned ngpio,void * c)358 evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
359 {
360 int status;
361
362 /* export dip switch option */
363 sw_gpio = gpio + 7;
364 status = gpio_request(sw_gpio, "user_sw");
365 if (status == 0)
366 status = gpio_direction_input(sw_gpio);
367 if (status == 0)
368 status = device_create_file(&client->dev, &dev_attr_user_sw);
369 else
370 gpio_free(sw_gpio);
371 if (status != 0)
372 sw_gpio = -EINVAL;
373
374 /* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */
375 gpio_request(gpio + 3, "pll_fs2");
376 gpio_direction_output(gpio + 3, 0);
377
378 gpio_request(gpio + 2, "pll_fs1");
379 gpio_direction_output(gpio + 2, 0);
380
381 gpio_request(gpio + 1, "pll_sr");
382 gpio_direction_output(gpio + 1, 0);
383
384 return 0;
385 }
386
387 static int
evm_u18_teardown(struct i2c_client * client,int gpio,unsigned ngpio,void * c)388 evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
389 {
390 gpio_free(gpio + 1);
391 gpio_free(gpio + 2);
392 gpio_free(gpio + 3);
393
394 if (sw_gpio > 0) {
395 device_remove_file(&client->dev, &dev_attr_user_sw);
396 gpio_free(sw_gpio);
397 }
398 return 0;
399 }
400
401 static struct pcf857x_platform_data pcf_data_u18 = {
402 .gpio_base = PCF_Uxx_BASE(1),
403 .n_latch = (1 << 3) | (1 << 2) | (1 << 1),
404 .setup = evm_u18_setup,
405 .teardown = evm_u18_teardown,
406 };
407
408
409 /* U35 - various I/O signals used to manage USB, CF, ATA, etc */
410
411 static int
evm_u35_setup(struct i2c_client * client,int gpio,unsigned ngpio,void * c)412 evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
413 {
414 /* p0 = nDRV_VBUS (initial: don't supply it) */
415 gpio_request(gpio + 0, "nDRV_VBUS");
416 gpio_direction_output(gpio + 0, 1);
417
418 /* p1 = VDDIMX_EN */
419 gpio_request(gpio + 1, "VDDIMX_EN");
420 gpio_direction_output(gpio + 1, 1);
421
422 /* p2 = VLYNQ_EN */
423 gpio_request(gpio + 2, "VLYNQ_EN");
424 gpio_direction_output(gpio + 2, 1);
425
426 /* p3 = n3V3_CF_RESET (initial: stay in reset) */
427 gpio_request(gpio + 3, "nCF_RESET");
428 gpio_direction_output(gpio + 3, 0);
429
430 /* (p4 unused) */
431
432 /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
433 gpio_request(gpio + 5, "WLAN_RESET");
434 gpio_direction_output(gpio + 5, 1);
435
436 /* p6 = nATA_SEL (initial: select) */
437 gpio_request(gpio + 6, "nATA_SEL");
438 gpio_direction_output(gpio + 6, 0);
439
440 /* p7 = nCF_SEL (initial: deselect) */
441 gpio_request(gpio + 7, "nCF_SEL");
442 gpio_direction_output(gpio + 7, 1);
443
444 return 0;
445 }
446
447 static int
evm_u35_teardown(struct i2c_client * client,int gpio,unsigned ngpio,void * c)448 evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
449 {
450 gpio_free(gpio + 7);
451 gpio_free(gpio + 6);
452 gpio_free(gpio + 5);
453 gpio_free(gpio + 3);
454 gpio_free(gpio + 2);
455 gpio_free(gpio + 1);
456 gpio_free(gpio + 0);
457 return 0;
458 }
459
460 static struct pcf857x_platform_data pcf_data_u35 = {
461 .gpio_base = PCF_Uxx_BASE(2),
462 .setup = evm_u35_setup,
463 .teardown = evm_u35_teardown,
464 };
465
466 /*----------------------------------------------------------------------*/
467
468 /* Most of this EEPROM is unused, but U-Boot uses some data:
469 * - 0x7f00, 6 bytes Ethernet Address
470 * - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
471 * - ... newer boards may have more
472 */
473
474 static struct at24_platform_data eeprom_info = {
475 .byte_len = (256*1024) / 8,
476 .page_size = 64,
477 .flags = AT24_FLAG_ADDR16,
478 .setup = davinci_get_mac_addr,
479 .context = (void *)0x7f00,
480 };
481
482 /*
483 * MSP430 supports RTC, card detection, input from IR remote, and
484 * a bit more. It triggers interrupts on GPIO(7) from pressing
485 * buttons on the IR remote, and for card detect switches.
486 */
487 static struct i2c_client *dm6446evm_msp;
488
dm6446evm_msp_probe(struct i2c_client * client,const struct i2c_device_id * id)489 static int dm6446evm_msp_probe(struct i2c_client *client,
490 const struct i2c_device_id *id)
491 {
492 dm6446evm_msp = client;
493 return 0;
494 }
495
dm6446evm_msp_remove(struct i2c_client * client)496 static int dm6446evm_msp_remove(struct i2c_client *client)
497 {
498 dm6446evm_msp = NULL;
499 return 0;
500 }
501
502 static const struct i2c_device_id dm6446evm_msp_ids[] = {
503 { "dm6446evm_msp", 0, },
504 { /* end of list */ },
505 };
506
507 static struct i2c_driver dm6446evm_msp_driver = {
508 .driver.name = "dm6446evm_msp",
509 .id_table = dm6446evm_msp_ids,
510 .probe = dm6446evm_msp_probe,
511 .remove = dm6446evm_msp_remove,
512 };
513
dm6444evm_msp430_get_pins(void)514 static int dm6444evm_msp430_get_pins(void)
515 {
516 static const char txbuf[2] = { 2, 4, };
517 char buf[4];
518 struct i2c_msg msg[2] = {
519 {
520 .addr = dm6446evm_msp->addr,
521 .flags = 0,
522 .len = 2,
523 .buf = (void __force *)txbuf,
524 },
525 {
526 .addr = dm6446evm_msp->addr,
527 .flags = I2C_M_RD,
528 .len = 4,
529 .buf = buf,
530 },
531 };
532 int status;
533
534 if (!dm6446evm_msp)
535 return -ENXIO;
536
537 /* Command 4 == get input state, returns port 2 and port3 data
538 * S Addr W [A] len=2 [A] cmd=4 [A]
539 * RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
540 */
541 status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
542 if (status < 0)
543 return status;
544
545 dev_dbg(&dm6446evm_msp->dev,
546 "PINS: %02x %02x %02x %02x\n",
547 buf[0], buf[1], buf[2], buf[3]);
548
549 return (buf[3] << 8) | buf[2];
550 }
551
dm6444evm_mmc_get_cd(int module)552 static int dm6444evm_mmc_get_cd(int module)
553 {
554 int status = dm6444evm_msp430_get_pins();
555
556 return (status < 0) ? status : !(status & BIT(1));
557 }
558
dm6444evm_mmc_get_ro(int module)559 static int dm6444evm_mmc_get_ro(int module)
560 {
561 int status = dm6444evm_msp430_get_pins();
562
563 return (status < 0) ? status : status & BIT(6 + 8);
564 }
565
566 static struct davinci_mmc_config dm6446evm_mmc_config = {
567 .get_cd = dm6444evm_mmc_get_cd,
568 .get_ro = dm6444evm_mmc_get_ro,
569 .wires = 4,
570 .version = MMC_CTLR_VERSION_1
571 };
572
573 static struct i2c_board_info __initdata i2c_info[] = {
574 {
575 I2C_BOARD_INFO("dm6446evm_msp", 0x23),
576 },
577 {
578 I2C_BOARD_INFO("pcf8574", 0x38),
579 .platform_data = &pcf_data_u2,
580 },
581 {
582 I2C_BOARD_INFO("pcf8574", 0x39),
583 .platform_data = &pcf_data_u18,
584 },
585 {
586 I2C_BOARD_INFO("pcf8574", 0x3a),
587 .platform_data = &pcf_data_u35,
588 },
589 {
590 I2C_BOARD_INFO("24c256", 0x50),
591 .platform_data = &eeprom_info,
592 },
593 {
594 I2C_BOARD_INFO("tlv320aic33", 0x1b),
595 },
596 };
597
598 /* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
599 * which requires 100 usec of idle bus after i2c writes sent to it.
600 */
601 static struct davinci_i2c_platform_data i2c_pdata = {
602 .bus_freq = 20 /* kHz */,
603 .bus_delay = 100 /* usec */,
604 .sda_pin = 44,
605 .scl_pin = 43,
606 };
607
evm_init_i2c(void)608 static void __init evm_init_i2c(void)
609 {
610 davinci_init_i2c(&i2c_pdata);
611 i2c_add_driver(&dm6446evm_msp_driver);
612 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
613 }
614
615 static struct platform_device *davinci_evm_devices[] __initdata = {
616 &davinci_fb_device,
617 &rtc_dev,
618 };
619
620 static struct davinci_uart_config uart_config __initdata = {
621 .enabled_uarts = (1 << 0),
622 };
623
624 static void __init
davinci_evm_map_io(void)625 davinci_evm_map_io(void)
626 {
627 /* setup input configuration for VPFE input devices */
628 dm644x_set_vpfe_config(&vpfe_cfg);
629 dm644x_init();
630 }
631
davinci_phy_fixup(struct phy_device * phydev)632 static int davinci_phy_fixup(struct phy_device *phydev)
633 {
634 unsigned int control;
635 /* CRITICAL: Fix for increasing PHY signal drive strength for
636 * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
637 * signal strength was low causing TX to fail randomly. The
638 * fix is to Set bit 11 (Increased MII drive strength) of PHY
639 * register 26 (Digital Config register) on this phy. */
640 control = phy_read(phydev, 26);
641 phy_write(phydev, 26, (control | 0x800));
642 return 0;
643 }
644
645 #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
646 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
647 #define HAS_ATA 1
648 #else
649 #define HAS_ATA 0
650 #endif
651
652 #if defined(CONFIG_MTD_PHYSMAP) || \
653 defined(CONFIG_MTD_PHYSMAP_MODULE)
654 #define HAS_NOR 1
655 #else
656 #define HAS_NOR 0
657 #endif
658
659 #if defined(CONFIG_MTD_NAND_DAVINCI) || \
660 defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
661 #define HAS_NAND 1
662 #else
663 #define HAS_NAND 0
664 #endif
665
davinci_evm_init(void)666 static __init void davinci_evm_init(void)
667 {
668 struct clk *aemif_clk;
669 struct davinci_soc_info *soc_info = &davinci_soc_info;
670
671 aemif_clk = clk_get(NULL, "aemif");
672 clk_enable(aemif_clk);
673
674 if (HAS_ATA) {
675 if (HAS_NAND || HAS_NOR)
676 pr_warning("WARNING: both IDE and Flash are "
677 "enabled, but they share AEMIF pins.\n"
678 "\tDisable IDE for NAND/NOR support.\n");
679 davinci_init_ide();
680 } else if (HAS_NAND || HAS_NOR) {
681 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
682 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
683
684 /* only one device will be jumpered and detected */
685 if (HAS_NAND) {
686 platform_device_register(&davinci_evm_nandflash_device);
687 evm_leds[7].default_trigger = "nand-disk";
688 if (HAS_NOR)
689 pr_warning("WARNING: both NAND and NOR flash "
690 "are enabled; disable one of them.\n");
691 } else if (HAS_NOR)
692 platform_device_register(&davinci_evm_norflash_device);
693 }
694
695 platform_add_devices(davinci_evm_devices,
696 ARRAY_SIZE(davinci_evm_devices));
697 evm_init_i2c();
698
699 davinci_setup_mmc(0, &dm6446evm_mmc_config);
700
701 davinci_serial_init(&uart_config);
702 dm644x_init_asp(&dm644x_evm_snd_data);
703
704 /* irlml6401 switches over 1A, in under 8 msec */
705 davinci_setup_usb(1000, 8);
706
707 soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
708 /* Register the fixup for PHY on DaVinci */
709 phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
710 davinci_phy_fixup);
711
712 }
713
714 MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
715 /* Maintainer: MontaVista Software <source@mvista.com> */
716 .atag_offset = 0x100,
717 .map_io = davinci_evm_map_io,
718 .init_irq = davinci_irq_init,
719 .timer = &davinci_timer,
720 .init_machine = davinci_evm_init,
721 .dma_zone_size = SZ_128M,
722 .restart = davinci_restart,
723 MACHINE_END
724