1 /* 2 * 3 * This file contains the hardware definitions of the BCMRing. 4 * 5 * Copyright (C) 1999 ARM Limited. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 */ 21 #ifndef __ASM_ARCH_HARDWARE_H 22 #define __ASM_ARCH_HARDWARE_H 23 24 #include <asm/sizes.h> 25 #include <cfg_global.h> 26 #include <mach/csp/mm_io.h> 27 28 /* Hardware addresses of major areas. 29 * *_START is the physical address 30 * *_SIZE is the size of the region 31 * *_BASE is the virtual address 32 */ 33 #define RAM_START PHYS_OFFSET 34 35 #define RAM_SIZE (CFG_GLOBAL_RAM_SIZE-CFG_GLOBAL_RAM_SIZE_RESERVED) 36 #define RAM_BASE PAGE_OFFSET 37 38 /* Macros to make managing spinlocks a bit more controlled in terms of naming. */ 39 /* See reg_gpio.h, reg_irq.h, arch.c, gpio.c for example usage. */ 40 #if defined(__KERNEL__) 41 #define HW_DECLARE_SPINLOCK(name) DEFINE_SPINLOCK(bcmring_##name##_reg_lock); 42 #define HW_EXTERN_SPINLOCK(name) extern spinlock_t bcmring_##name##_reg_lock; 43 #define HW_IRQ_SAVE(name, val) spin_lock_irqsave(&bcmring_##name##_reg_lock, (val)) 44 #define HW_IRQ_RESTORE(name, val) spin_unlock_irqrestore(&bcmring_##name##_reg_lock, (val)) 45 #else 46 #define HW_DECLARE_SPINLOCK(name) 47 #define HW_EXTERN_SPINLOCK(name) 48 #define HW_IRQ_SAVE(name, val) {(void)(name); (void)(val); } 49 #define HW_IRQ_RESTORE(name, val) {(void)(name); (void)(val); } 50 #endif 51 52 #ifndef HW_IO_PHYS_TO_VIRT 53 #define HW_IO_PHYS_TO_VIRT MM_IO_PHYS_TO_VIRT 54 #endif 55 #define HW_IO_VIRT_TO_PHYS MM_IO_VIRT_TO_PHYS 56 57 #endif 58