1SMBus Protocol Summary
2======================
3
4The following is a summary of the SMBus protocol. It applies to
5all revisions of the protocol (1.0, 1.1, and 2.0).
6Certain protocol features which are not supported by
7this package are briefly described at the end of this document.
8
9Some adapters understand only the SMBus (System Management Bus) protocol,
10which is a subset from the I2C protocol. Fortunately, many devices use
11only the same subset, which makes it possible to put them on an SMBus.
12
13If you write a driver for some I2C device, please try to use the SMBus
14commands if at all possible (if the device uses only that subset of the
15I2C protocol). This makes it possible to use the device driver on both
16SMBus adapters and I2C adapters (the SMBus command set is automatically
17translated to I2C on I2C adapters, but plain I2C commands can not be
18handled at all on most pure SMBus adapters).
19
20Below is a list of SMBus protocol operations, and the functions executing
21them.  Note that the names used in the SMBus protocol specifications usually
22don't match these function names.  For some of the operations which pass a
23single data byte, the functions using SMBus protocol operation names execute
24a different protocol operation entirely.
25
26
27Key to symbols
28==============
29
30S     (1 bit) : Start bit
31P     (1 bit) : Stop bit
32Rd/Wr (1 bit) : Read/Write bit. Rd equals 1, Wr equals 0.
33A, NA (1 bit) : Accept and reverse accept bit.
34Addr  (7 bits): I2C 7 bit address. Note that this can be expanded as usual to
35                get a 10 bit I2C address.
36Comm  (8 bits): Command byte, a data byte which often selects a register on
37                the device.
38Data  (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh
39                for 16 bit data.
40Count (8 bits): A data byte containing the length of a block operation.
41
42[..]: Data sent by I2C device, as opposed to data sent by the host adapter.
43
44
45SMBus Quick Command
46===================
47
48This sends a single bit to the device, at the place of the Rd/Wr bit.
49
50A Addr Rd/Wr [A] P
51
52
53SMBus Receive Byte:  i2c_smbus_read_byte()
54==========================================
55
56This reads a single byte from a device, without specifying a device
57register. Some devices are so simple that this interface is enough; for
58others, it is a shorthand if you want to read the same register as in
59the previous SMBus command.
60
61S Addr Rd [A] [Data] NA P
62
63
64SMBus Send Byte:  i2c_smbus_write_byte()
65========================================
66
67This operation is the reverse of Receive Byte: it sends a single byte
68to a device.  See Receive Byte for more information.
69
70S Addr Wr [A] Data [A] P
71
72
73SMBus Read Byte:  i2c_smbus_read_byte_data()
74============================================
75
76This reads a single byte from a device, from a designated register.
77The register is specified through the Comm byte.
78
79S Addr Wr [A] Comm [A] S Addr Rd [A] [Data] NA P
80
81
82SMBus Read Word:  i2c_smbus_read_word_data()
83============================================
84
85This operation is very like Read Byte; again, data is read from a
86device, from a designated register that is specified through the Comm
87byte. But this time, the data is a complete word (16 bits).
88
89S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P
90
91Note the convenience function i2c_smbus_read_word_swapped is
92available for reads where the two data bytes are the other way
93around (not SMBus compliant, but very popular.)
94
95
96SMBus Write Byte:  i2c_smbus_write_byte_data()
97==============================================
98
99This writes a single byte to a device, to a designated register. The
100register is specified through the Comm byte. This is the opposite of
101the Read Byte operation.
102
103S Addr Wr [A] Comm [A] Data [A] P
104
105
106SMBus Write Word:  i2c_smbus_write_word_data()
107==============================================
108
109This is the opposite of the Read Word operation. 16 bits
110of data is written to a device, to the designated register that is
111specified through the Comm byte.
112
113S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P
114
115Note the convenience function i2c_smbus_write_word_swapped is
116available for writes where the two data bytes are the other way
117around (not SMBus compliant, but very popular.)
118
119
120SMBus Process Call:  i2c_smbus_process_call()
121=============================================
122
123This command selects a device register (through the Comm byte), sends
12416 bits of data to it, and reads 16 bits of data in return.
125
126S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A]
127                             S Addr Rd [A] [DataLow] A [DataHigh] NA P
128
129
130SMBus Block Read:  i2c_smbus_read_block_data()
131==============================================
132
133This command reads a block of up to 32 bytes from a device, from a
134designated register that is specified through the Comm byte. The amount
135of data is specified by the device in the Count byte.
136
137S Addr Wr [A] Comm [A]
138           S Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P
139
140
141SMBus Block Write:  i2c_smbus_write_block_data()
142================================================
143
144The opposite of the Block Read command, this writes up to 32 bytes to
145a device, to a designated register that is specified through the
146Comm byte. The amount of data is specified in the Count byte.
147
148S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P
149
150
151SMBus Block Write - Block Read Process Call
152===========================================
153
154SMBus Block Write - Block Read Process Call was introduced in
155Revision 2.0 of the specification.
156
157This command selects a device register (through the Comm byte), sends
1581 to 31 bytes of data to it, and reads 1 to 31 bytes of data in return.
159
160S Addr Wr [A] Comm [A] Count [A] Data [A] ...
161                             S Addr Rd [A] [Count] A [Data] ... A P
162
163
164SMBus Host Notify
165=================
166
167This command is sent from a SMBus device acting as a master to the
168SMBus host acting as a slave.
169It is the same form as Write Word, with the command code replaced by the
170alerting device's address.
171
172[S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P]
173
174
175Packet Error Checking (PEC)
176===========================
177
178Packet Error Checking was introduced in Revision 1.1 of the specification.
179
180PEC adds a CRC-8 error-checking byte to transfers using it, immediately
181before the terminating STOP.
182
183
184Address Resolution Protocol (ARP)
185=================================
186
187The Address Resolution Protocol was introduced in Revision 2.0 of
188the specification. It is a higher-layer protocol which uses the
189messages above.
190
191ARP adds device enumeration and dynamic address assignment to
192the protocol. All ARP communications use slave address 0x61 and
193require PEC checksums.
194
195
196SMBus Alert
197===========
198
199SMBus Alert was introduced in Revision 1.0 of the specification.
200
201The SMBus alert protocol allows several SMBus slave devices to share a
202single interrupt pin on the SMBus master, while still allowing the master
203to know which slave triggered the interrupt.
204
205This is implemented the following way in the Linux kernel:
206* I2C bus drivers which support SMBus alert should call
207  i2c_setup_smbus_alert() to setup SMBus alert support.
208* I2C drivers for devices which can trigger SMBus alerts should implement
209  the optional alert() callback.
210
211
212I2C Block Transactions
213======================
214
215The following I2C block transactions are supported by the
216SMBus layer and are described here for completeness.
217They are *NOT* defined by the SMBus specification.
218
219I2C block transactions do not limit the number of bytes transferred
220but the SMBus layer places a limit of 32 bytes.
221
222
223I2C Block Read:  i2c_smbus_read_i2c_block_data()
224================================================
225
226This command reads a block of bytes from a device, from a
227designated register that is specified through the Comm byte.
228
229S Addr Wr [A] Comm [A]
230           S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
231
232
233I2C Block Read (2 Comm bytes)
234=============================
235
236This command reads a block of bytes from a device, from a
237designated register that is specified through the two Comm bytes.
238
239S Addr Wr [A] Comm1 [A] Comm2 [A]
240           S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
241
242
243I2C Block Write:  i2c_smbus_write_i2c_block_data()
244==================================================
245
246The opposite of the Block Read command, this writes bytes to
247a device, to a designated register that is specified through the
248Comm byte. Note that command lengths of 0, 2, or more bytes are
249supported as they are indistinguishable from data.
250
251S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P
252