1 #include "kvm/virtio-pci.h"
2
3 #include "kvm/ioport.h"
4 #include "kvm/virtio.h"
5 #include "kvm/virtio-pci-dev.h"
6
7 #include <linux/virtio_config.h>
8
9 #define VPCI_CFG_COMMON_SIZE sizeof(struct virtio_pci_common_cfg)
10 #define VPCI_CFG_COMMON_START 0
11 #define VPCI_CFG_COMMON_END (VPCI_CFG_COMMON_SIZE - 1)
12 /*
13 * Use a naturally aligned 4-byte doorbell, in case we ever want to
14 * implement VIRTIO_F_NOTIFICATION_DATA
15 */
16 #define VPCI_CFG_NOTIFY_SIZE 4
17 #define VPCI_CFG_NOTIFY_START (VPCI_CFG_COMMON_END + 1)
18 #define VPCI_CFG_NOTIFY_END (VPCI_CFG_COMMON_END + VPCI_CFG_NOTIFY_SIZE)
19 #define VPCI_CFG_ISR_SIZE 4
20 #define VPCI_CFG_ISR_START (VPCI_CFG_NOTIFY_END + 1)
21 #define VPCI_CFG_ISR_END (VPCI_CFG_NOTIFY_END + VPCI_CFG_ISR_SIZE)
22 /*
23 * We're at 64 bytes. Use the remaining 192 bytes in PCI_IO_SIZE for the
24 * device-specific config space. It's sufficient for the devices we
25 * currently implement (virtio_blk_config is 60 bytes) and, I think, all
26 * existing virtio 1.2 devices.
27 */
28 #define VPCI_CFG_DEV_START (VPCI_CFG_ISR_END + 1)
29 #define VPCI_CFG_DEV_END ((PCI_IO_SIZE) - 1)
30 #define VPCI_CFG_DEV_SIZE (VPCI_CFG_DEV_END - VPCI_CFG_DEV_START + 1)
31
32 #define vpci_selected_vq(vpci) \
33 vdev->ops->get_vq((vpci)->kvm, (vpci)->dev, (vpci)->queue_selector)
34
35 typedef bool (*access_handler_t)(struct virtio_device *, unsigned long, void *, int);
36
virtio_pci__common_write(struct virtio_device * vdev,unsigned long offset,void * data,int size)37 static bool virtio_pci__common_write(struct virtio_device *vdev,
38 unsigned long offset, void *data, int size)
39 {
40 u64 features;
41 u32 val, gsi, vec;
42 struct virtio_pci *vpci = vdev->virtio;
43
44 switch (offset - VPCI_CFG_COMMON_START) {
45 case VIRTIO_PCI_COMMON_DFSELECT:
46 vpci->device_features_sel = ioport__read32(data);
47 break;
48 case VIRTIO_PCI_COMMON_GFSELECT:
49 vpci->driver_features_sel = ioport__read32(data);
50 break;
51 case VIRTIO_PCI_COMMON_GF:
52 val = ioport__read32(data);
53 if (vpci->driver_features_sel > 1)
54 break;
55
56 features = (u64)val << (32 * vpci->driver_features_sel);
57 virtio_set_guest_features(vpci->kvm, vdev, vpci->dev, features);
58 break;
59 case VIRTIO_PCI_COMMON_MSIX:
60 vec = vpci->config_vector = ioport__read16(data);
61 gsi = virtio_pci__add_msix_route(vpci, vec);
62 if (gsi < 0)
63 break;
64
65 vpci->config_gsi = gsi;
66 break;
67 case VIRTIO_PCI_COMMON_STATUS:
68 vpci->status = ioport__read8(data);
69 virtio_notify_status(vpci->kvm, vdev, vpci->dev, vpci->status);
70 break;
71 case VIRTIO_PCI_COMMON_Q_SELECT:
72 val = ioport__read16(data);
73 if (val >= (u32)vdev->ops->get_vq_count(vpci->kvm, vpci->dev))
74 pr_warning("invalid vq number %u", val);
75 else
76 vpci->queue_selector = val;
77 break;
78 case VIRTIO_PCI_COMMON_Q_SIZE:
79 vdev->ops->set_size_vq(vpci->kvm, vpci->dev,
80 vpci->queue_selector,
81 ioport__read16(data));
82 break;
83 case VIRTIO_PCI_COMMON_Q_MSIX:
84 vec = vpci->vq_vector[vpci->queue_selector] = ioport__read16(data);
85
86 gsi = virtio_pci__add_msix_route(vpci, vec);
87 if (gsi < 0)
88 break;
89
90 vpci->gsis[vpci->queue_selector] = gsi;
91 if (vdev->ops->notify_vq_gsi)
92 vdev->ops->notify_vq_gsi(vpci->kvm, vpci->dev,
93 vpci->queue_selector, gsi);
94 break;
95 case VIRTIO_PCI_COMMON_Q_ENABLE:
96 val = ioport__read16(data);
97 if (val)
98 virtio_pci_init_vq(vpci->kvm, vdev, vpci->queue_selector);
99 else
100 virtio_pci_exit_vq(vpci->kvm, vdev, vpci->queue_selector);
101 break;
102 case VIRTIO_PCI_COMMON_Q_DESCLO:
103 vpci_selected_vq(vpci)->vring_addr.desc_lo = ioport__read32(data);
104 break;
105 case VIRTIO_PCI_COMMON_Q_DESCHI:
106 vpci_selected_vq(vpci)->vring_addr.desc_hi = ioport__read32(data);
107 break;
108 case VIRTIO_PCI_COMMON_Q_AVAILLO:
109 vpci_selected_vq(vpci)->vring_addr.avail_lo = ioport__read32(data);
110 break;
111 case VIRTIO_PCI_COMMON_Q_AVAILHI:
112 vpci_selected_vq(vpci)->vring_addr.avail_hi = ioport__read32(data);
113 break;
114 case VIRTIO_PCI_COMMON_Q_USEDLO:
115 vpci_selected_vq(vpci)->vring_addr.used_lo = ioport__read32(data);
116 break;
117 case VIRTIO_PCI_COMMON_Q_USEDHI:
118 vpci_selected_vq(vpci)->vring_addr.used_hi = ioport__read32(data);
119 break;
120 }
121
122 return true;
123 }
124
virtio_pci__notify_write(struct virtio_device * vdev,unsigned long offset,void * data,int size)125 static bool virtio_pci__notify_write(struct virtio_device *vdev,
126 unsigned long offset, void *data, int size)
127 {
128 u16 vq = ioport__read16(data);
129 struct virtio_pci *vpci = vdev->virtio;
130
131 vdev->ops->notify_vq(vpci->kvm, vpci->dev, vq);
132
133 return true;
134 }
135
virtio_pci__config_write(struct virtio_device * vdev,unsigned long offset,void * data,int size)136 static bool virtio_pci__config_write(struct virtio_device *vdev,
137 unsigned long offset, void *data, int size)
138 {
139 struct virtio_pci *vpci = vdev->virtio;
140
141 return virtio_access_config(vpci->kvm, vdev, vpci->dev,
142 offset - VPCI_CFG_DEV_START, data, size,
143 true);
144 }
145
virtio_pci__common_read(struct virtio_device * vdev,unsigned long offset,void * data,int size)146 static bool virtio_pci__common_read(struct virtio_device *vdev,
147 unsigned long offset, void *data, int size)
148 {
149 u32 val;
150 struct virtio_pci *vpci = vdev->virtio;
151 u64 features = 1ULL << VIRTIO_F_VERSION_1;
152
153 switch (offset - VPCI_CFG_COMMON_START) {
154 case VIRTIO_PCI_COMMON_DFSELECT:
155 val = vpci->device_features_sel;
156 ioport__write32(data, val);
157 break;
158 case VIRTIO_PCI_COMMON_DF:
159 if (vpci->device_features_sel > 1)
160 break;
161 features |= vdev->ops->get_host_features(vpci->kvm, vpci->dev);
162 val = features >> (32 * vpci->device_features_sel);
163 ioport__write32(data, val);
164 break;
165 case VIRTIO_PCI_COMMON_GFSELECT:
166 val = vpci->driver_features_sel;
167 ioport__write32(data, val);
168 break;
169 case VIRTIO_PCI_COMMON_MSIX:
170 val = vpci->config_vector;
171 ioport__write32(data, val);
172 break;
173 case VIRTIO_PCI_COMMON_NUMQ:
174 val = vdev->ops->get_vq_count(vpci->kvm, vpci->dev);
175 ioport__write32(data, val);
176 break;
177 case VIRTIO_PCI_COMMON_STATUS:
178 ioport__write8(data, vpci->status);
179 break;
180 case VIRTIO_PCI_COMMON_CFGGENERATION:
181 /*
182 * The config generation changes when the device updates a
183 * config field larger than 32 bits, that the driver may read
184 * using multiple accesses. Since kvmtool doesn't use any
185 * mutable config field larger than 32 bits, the generation is
186 * constant.
187 */
188 ioport__write8(data, 0);
189 break;
190 case VIRTIO_PCI_COMMON_Q_SELECT:
191 ioport__write16(data, vpci->queue_selector);
192 break;
193 case VIRTIO_PCI_COMMON_Q_SIZE:
194 val = vdev->ops->get_size_vq(vpci->kvm, vpci->dev,
195 vpci->queue_selector);
196 ioport__write16(data, val);
197 break;
198 case VIRTIO_PCI_COMMON_Q_MSIX:
199 val = vpci->vq_vector[vpci->queue_selector];
200 ioport__write16(data, val);
201 break;
202 case VIRTIO_PCI_COMMON_Q_ENABLE:
203 val = vpci_selected_vq(vpci)->enabled;
204 ioport__write16(data, val);
205 break;
206 case VIRTIO_PCI_COMMON_Q_NOFF:
207 val = vpci->queue_selector;
208 ioport__write16(data, val);
209 break;
210 case VIRTIO_PCI_COMMON_Q_DESCLO:
211 val = vpci_selected_vq(vpci)->vring_addr.desc_lo;
212 ioport__write32(data, val);
213 break;
214 case VIRTIO_PCI_COMMON_Q_DESCHI:
215 val = vpci_selected_vq(vpci)->vring_addr.desc_hi;
216 ioport__write32(data, val);
217 break;
218 case VIRTIO_PCI_COMMON_Q_AVAILLO:
219 val = vpci_selected_vq(vpci)->vring_addr.avail_lo;
220 ioport__write32(data, val);
221 break;
222 case VIRTIO_PCI_COMMON_Q_AVAILHI:
223 val = vpci_selected_vq(vpci)->vring_addr.avail_hi;
224 ioport__write32(data, val);
225 break;
226 case VIRTIO_PCI_COMMON_Q_USEDLO:
227 val = vpci_selected_vq(vpci)->vring_addr.used_lo;
228 ioport__write32(data, val);
229 break;
230 case VIRTIO_PCI_COMMON_Q_USEDHI:
231 val = vpci_selected_vq(vpci)->vring_addr.used_hi;
232 ioport__write32(data, val);
233 break;
234 };
235
236 return true;
237 }
238
virtio_pci__isr_read(struct virtio_device * vdev,unsigned long offset,void * data,int size)239 static bool virtio_pci__isr_read(struct virtio_device *vdev,
240 unsigned long offset, void *data, int size)
241 {
242 struct virtio_pci *vpci = vdev->virtio;
243
244 if (WARN_ON(offset - VPCI_CFG_ISR_START != 0))
245 return false;
246
247 ioport__write8(data, vpci->isr);
248 kvm__irq_line(vpci->kvm, vpci->legacy_irq_line, VIRTIO_IRQ_LOW);
249 vpci->isr = 0;
250
251 return 0;
252 }
253
virtio_pci__config_read(struct virtio_device * vdev,unsigned long offset,void * data,int size)254 static bool virtio_pci__config_read(struct virtio_device *vdev,
255 unsigned long offset, void *data, int size)
256 {
257 struct virtio_pci *vpci = vdev->virtio;
258
259 return virtio_access_config(vpci->kvm, vdev, vpci->dev,
260 offset - VPCI_CFG_DEV_START, data, size,
261 false);
262 }
263
virtio_pci_access(struct kvm_cpu * vcpu,struct virtio_device * vdev,unsigned long offset,void * data,int size,bool write)264 static bool virtio_pci_access(struct kvm_cpu *vcpu, struct virtio_device *vdev,
265 unsigned long offset, void *data, int size,
266 bool write)
267 {
268 access_handler_t handler = NULL;
269
270 switch (offset) {
271 case VPCI_CFG_COMMON_START...VPCI_CFG_COMMON_END:
272 if (write)
273 handler = virtio_pci__common_write;
274 else
275 handler = virtio_pci__common_read;
276 break;
277 case VPCI_CFG_NOTIFY_START...VPCI_CFG_NOTIFY_END:
278 if (write)
279 handler = virtio_pci__notify_write;
280 break;
281 case VPCI_CFG_ISR_START...VPCI_CFG_ISR_END:
282 if (!write)
283 handler = virtio_pci__isr_read;
284 break;
285 case VPCI_CFG_DEV_START...VPCI_CFG_DEV_END:
286 if (write)
287 handler = virtio_pci__config_write;
288 else
289 handler = virtio_pci__config_read;
290 break;
291 }
292
293 if (!handler)
294 return false;
295
296 return handler(vdev, offset, data, size);
297 }
298
virtio_pci_modern__io_mmio_callback(struct kvm_cpu * vcpu,u64 addr,u8 * data,u32 len,u8 is_write,void * ptr)299 void virtio_pci_modern__io_mmio_callback(struct kvm_cpu *vcpu, u64 addr,
300 u8 *data, u32 len, u8 is_write,
301 void *ptr)
302 {
303 struct virtio_device *vdev = ptr;
304 struct virtio_pci *vpci = vdev->virtio;
305 u32 mmio_addr = virtio_pci__mmio_addr(vpci);
306
307 virtio_pci_access(vcpu, vdev, addr - mmio_addr, data, len, is_write);
308 }
309
virtio_pci_modern_init(struct virtio_device * vdev)310 int virtio_pci_modern_init(struct virtio_device *vdev)
311 {
312 int subsys_id;
313 struct virtio_pci *vpci = vdev->virtio;
314 struct pci_device_header *hdr = &vpci->pci_hdr;
315
316 subsys_id = le16_to_cpu(hdr->subsys_id);
317
318 hdr->device_id = cpu_to_le16(PCI_DEVICE_ID_VIRTIO_BASE + subsys_id);
319 hdr->subsys_id = cpu_to_le16(PCI_SUBSYS_ID_VIRTIO_BASE + subsys_id);
320
321 vpci->doorbell_offset = VPCI_CFG_NOTIFY_START;
322 vdev->endian = VIRTIO_ENDIAN_LE;
323
324 hdr->msix.next = PCI_CAP_OFF(hdr, virtio);
325
326 hdr->virtio.common = (struct virtio_pci_cap) {
327 .cap_vndr = PCI_CAP_ID_VNDR,
328 .cap_next = PCI_CAP_OFF(hdr, virtio.notify),
329 .cap_len = sizeof(hdr->virtio.common),
330 .cfg_type = VIRTIO_PCI_CAP_COMMON_CFG,
331 .bar = 1,
332 .offset = cpu_to_le32(VPCI_CFG_COMMON_START),
333 .length = cpu_to_le32(VPCI_CFG_COMMON_SIZE),
334 };
335 BUILD_BUG_ON(VPCI_CFG_COMMON_START & 0x3);
336
337 hdr->virtio.notify = (struct virtio_pci_notify_cap) {
338 .cap.cap_vndr = PCI_CAP_ID_VNDR,
339 .cap.cap_next = PCI_CAP_OFF(hdr, virtio.isr),
340 .cap.cap_len = sizeof(hdr->virtio.notify),
341 .cap.cfg_type = VIRTIO_PCI_CAP_NOTIFY_CFG,
342 .cap.bar = 1,
343 .cap.offset = cpu_to_le32(VPCI_CFG_NOTIFY_START),
344 .cap.length = cpu_to_le32(VPCI_CFG_NOTIFY_SIZE),
345 /*
346 * Notify multiplier is 0, meaning that notifications are all on
347 * the same register
348 */
349 };
350 BUILD_BUG_ON(VPCI_CFG_NOTIFY_START & 0x3);
351
352 hdr->virtio.isr = (struct virtio_pci_cap) {
353 .cap_vndr = PCI_CAP_ID_VNDR,
354 .cap_next = PCI_CAP_OFF(hdr, virtio.device),
355 .cap_len = sizeof(hdr->virtio.isr),
356 .cfg_type = VIRTIO_PCI_CAP_ISR_CFG,
357 .bar = 1,
358 .offset = cpu_to_le32(VPCI_CFG_ISR_START),
359 .length = cpu_to_le32(VPCI_CFG_ISR_SIZE),
360 };
361
362 hdr->virtio.device = (struct virtio_pci_cap) {
363 .cap_vndr = PCI_CAP_ID_VNDR,
364 .cap_next = PCI_CAP_OFF(hdr, virtio.pci),
365 .cap_len = sizeof(hdr->virtio.device),
366 .cfg_type = VIRTIO_PCI_CAP_DEVICE_CFG,
367 .bar = 1,
368 .offset = cpu_to_le32(VPCI_CFG_DEV_START),
369 .length = cpu_to_le32(VPCI_CFG_DEV_SIZE),
370 };
371 BUILD_BUG_ON(VPCI_CFG_DEV_START & 0x3);
372
373 /*
374 * TODO: implement this weird proxy capability (it is a "MUST" in the
375 * spec, but I don't know if anyone actually uses it).
376 * It doesn't use any BAR space. Instead the driver writes .cap.offset
377 * and .cap.length to access a register in a BAR.
378 */
379 hdr->virtio.pci = (struct virtio_pci_cfg_cap) {
380 .cap.cap_vndr = PCI_CAP_ID_VNDR,
381 .cap.cap_next = 0,
382 .cap.cap_len = sizeof(hdr->virtio.pci),
383 .cap.cfg_type = VIRTIO_PCI_CAP_PCI_CFG,
384 };
385
386 return 0;
387 }
388