1899fe063SPekka Enberg #include "kvm/8250-serial.h" 213a7760fSPekka Enberg 38eb47d29SSasha Levin #include "kvm/read-write.h" 413a7760fSPekka Enberg #include "kvm/ioport.h" 54ef0f4d6SPekka Enberg #include "kvm/mutex.h" 646aa8d69SPekka Enberg #include "kvm/util.h" 705d1a2a6SAsias He #include "kvm/term.h" 8e557eef9SPekka Enberg #include "kvm/kvm.h" 913a7760fSPekka Enberg 103fdf659dSSasha Levin #include <linux/types.h> 114e49b05bSCyrill Gorcunov #include <linux/serial_reg.h> 124e49b05bSCyrill Gorcunov 132932c9ebSPekka Enberg #include <pthread.h> 1413a7760fSPekka Enberg 15*d4b02a37SThomas Gleixner /* 16*d4b02a37SThomas Gleixner * This fakes a U6_16550A. The fifo len needs to be 64 as the kernel 17*d4b02a37SThomas Gleixner * expects that for autodetection. 18*d4b02a37SThomas Gleixner */ 19*d4b02a37SThomas Gleixner #define FIFO_LEN 64 20*d4b02a37SThomas Gleixner #define FIFO_MASK (FIFO_LEN - 1) 21*d4b02a37SThomas Gleixner 22*d4b02a37SThomas Gleixner #define UART_IIR_TYPE_BITS 0xc0 23*d4b02a37SThomas Gleixner 2446aa8d69SPekka Enberg struct serial8250_device { 252932c9ebSPekka Enberg pthread_mutex_t mutex; 261add4b76SSasha Levin u8 id; 272932c9ebSPekka Enberg 283fdf659dSSasha Levin u16 iobase; 293fdf659dSSasha Levin u8 irq; 30f6b8ccc1SThomas Gleixner u8 irq_state; 318dfae8beSThomas Gleixner int txcnt; 32*d4b02a37SThomas Gleixner int rxcnt; 33*d4b02a37SThomas Gleixner int rxdone; 34*d4b02a37SThomas Gleixner char txbuf[FIFO_LEN]; 35*d4b02a37SThomas Gleixner char rxbuf[FIFO_LEN]; 3676b4a122SPekka Enberg 373fdf659dSSasha Levin u8 dll; 383fdf659dSSasha Levin u8 dlm; 393fdf659dSSasha Levin u8 iir; 403fdf659dSSasha Levin u8 ier; 413fdf659dSSasha Levin u8 fcr; 423fdf659dSSasha Levin u8 lcr; 433fdf659dSSasha Levin u8 mcr; 443fdf659dSSasha Levin u8 lsr; 453fdf659dSSasha Levin u8 msr; 463fdf659dSSasha Levin u8 scr; 4746aa8d69SPekka Enberg }; 4846aa8d69SPekka Enberg 49f3efa592SLiming Wang #define SERIAL_REGS_SETTING \ 50f3efa592SLiming Wang .iir = UART_IIR_NO_INT, \ 51f3efa592SLiming Wang .lsr = UART_LSR_TEMT | UART_LSR_THRE, \ 52f3efa592SLiming Wang .msr = UART_MSR_DCD | UART_MSR_DSR | UART_MSR_CTS, \ 53f3efa592SLiming Wang .mcr = UART_MCR_OUT2, 54f3efa592SLiming Wang 55e62c18deSPekka Enberg static struct serial8250_device devices[] = { 56c6a69c61SPekka Enberg /* ttyS0 */ 57c6a69c61SPekka Enberg [0] = { 582932c9ebSPekka Enberg .mutex = PTHREAD_MUTEX_INITIALIZER, 592932c9ebSPekka Enberg 601add4b76SSasha Levin .id = 0, 61c6a69c61SPekka Enberg .iobase = 0x3f8, 62e557eef9SPekka Enberg .irq = 4, 63e557eef9SPekka Enberg 64f3efa592SLiming Wang SERIAL_REGS_SETTING 65c6a69c61SPekka Enberg }, 66e62c18deSPekka Enberg /* ttyS1 */ 67e62c18deSPekka Enberg [1] = { 682932c9ebSPekka Enberg .mutex = PTHREAD_MUTEX_INITIALIZER, 692932c9ebSPekka Enberg 701add4b76SSasha Levin .id = 1, 71e62c18deSPekka Enberg .iobase = 0x2f8, 72e62c18deSPekka Enberg .irq = 3, 73133bedc1SPekka Enberg 74f3efa592SLiming Wang SERIAL_REGS_SETTING 75e62c18deSPekka Enberg }, 76e62c18deSPekka Enberg /* ttyS2 */ 77e62c18deSPekka Enberg [2] = { 782932c9ebSPekka Enberg .mutex = PTHREAD_MUTEX_INITIALIZER, 792932c9ebSPekka Enberg 801add4b76SSasha Levin .id = 2, 81e62c18deSPekka Enberg .iobase = 0x3e8, 82e62c18deSPekka Enberg .irq = 4, 83133bedc1SPekka Enberg 84f3efa592SLiming Wang SERIAL_REGS_SETTING 85e62c18deSPekka Enberg }, 86bf459c83SPekka Enberg /* ttyS3 */ 87bf459c83SPekka Enberg [3] = { 88bf459c83SPekka Enberg .mutex = PTHREAD_MUTEX_INITIALIZER, 89bf459c83SPekka Enberg 901add4b76SSasha Levin .id = 3, 91bf459c83SPekka Enberg .iobase = 0x2e8, 92bf459c83SPekka Enberg .irq = 3, 93bf459c83SPekka Enberg 94f3efa592SLiming Wang SERIAL_REGS_SETTING 95bf459c83SPekka Enberg }, 9646aa8d69SPekka Enberg }; 9746aa8d69SPekka Enberg 98*d4b02a37SThomas Gleixner static void serial8250_flush_tx(struct serial8250_device *dev) 99*d4b02a37SThomas Gleixner { 100*d4b02a37SThomas Gleixner dev->lsr |= UART_LSR_TEMT | UART_LSR_THRE; 101*d4b02a37SThomas Gleixner 102*d4b02a37SThomas Gleixner if (dev->txcnt) { 103*d4b02a37SThomas Gleixner term_putc(CONSOLE_8250, dev->txbuf, dev->txcnt, dev->id); 104*d4b02a37SThomas Gleixner dev->txcnt = 0; 105*d4b02a37SThomas Gleixner } 106*d4b02a37SThomas Gleixner } 107*d4b02a37SThomas Gleixner 108f6b8ccc1SThomas Gleixner static void serial8250_update_irq(struct kvm *kvm, struct serial8250_device *dev) 109f6b8ccc1SThomas Gleixner { 110f6b8ccc1SThomas Gleixner u8 iir = 0; 111f6b8ccc1SThomas Gleixner 112*d4b02a37SThomas Gleixner /* Handle clear rx */ 113*d4b02a37SThomas Gleixner if (dev->lcr & UART_FCR_CLEAR_RCVR) { 114*d4b02a37SThomas Gleixner dev->lcr &= ~UART_FCR_CLEAR_RCVR; 115*d4b02a37SThomas Gleixner dev->rxcnt = dev->rxdone = 0; 116*d4b02a37SThomas Gleixner dev->lsr &= ~UART_LSR_DR; 117*d4b02a37SThomas Gleixner } 118*d4b02a37SThomas Gleixner 119*d4b02a37SThomas Gleixner /* Handle clear tx */ 120*d4b02a37SThomas Gleixner if (dev->lcr & UART_FCR_CLEAR_XMIT) { 121*d4b02a37SThomas Gleixner dev->lcr &= ~UART_FCR_CLEAR_XMIT; 122*d4b02a37SThomas Gleixner dev->txcnt = 0; 123*d4b02a37SThomas Gleixner dev->lsr |= UART_LSR_TEMT | UART_LSR_THRE; 124*d4b02a37SThomas Gleixner } 125*d4b02a37SThomas Gleixner 126f6b8ccc1SThomas Gleixner /* Data ready and rcv interrupt enabled ? */ 127f6b8ccc1SThomas Gleixner if ((dev->ier & UART_IER_RDI) && (dev->lsr & UART_LSR_DR)) 128f6b8ccc1SThomas Gleixner iir |= UART_IIR_RDI; 129f6b8ccc1SThomas Gleixner 130f6b8ccc1SThomas Gleixner /* Transmitter empty and interrupt enabled ? */ 131f6b8ccc1SThomas Gleixner if ((dev->ier & UART_IER_THRI) && (dev->lsr & UART_LSR_TEMT)) 132f6b8ccc1SThomas Gleixner iir |= UART_IIR_THRI; 133f6b8ccc1SThomas Gleixner 134f6b8ccc1SThomas Gleixner /* Now update the irq line, if necessary */ 135f6b8ccc1SThomas Gleixner if (!iir) { 136f6b8ccc1SThomas Gleixner dev->iir = UART_IIR_NO_INT; 137f6b8ccc1SThomas Gleixner if (dev->irq_state) 138f6b8ccc1SThomas Gleixner kvm__irq_line(kvm, dev->irq, 0); 139f6b8ccc1SThomas Gleixner } else { 140f6b8ccc1SThomas Gleixner dev->iir = iir; 141f6b8ccc1SThomas Gleixner if (!dev->irq_state) 142f6b8ccc1SThomas Gleixner kvm__irq_line(kvm, dev->irq, 1); 143f6b8ccc1SThomas Gleixner } 144f6b8ccc1SThomas Gleixner dev->irq_state = iir; 1458dfae8beSThomas Gleixner 1468dfae8beSThomas Gleixner /* 1478dfae8beSThomas Gleixner * If the kernel disabled the tx interrupt, we know that there 1488dfae8beSThomas Gleixner * is nothing more to transmit, so we can reset our tx logic 1498dfae8beSThomas Gleixner * here. 1508dfae8beSThomas Gleixner */ 151*d4b02a37SThomas Gleixner if (!(dev->ier & UART_IER_THRI)) 152*d4b02a37SThomas Gleixner serial8250_flush_tx(dev); 153f6b8ccc1SThomas Gleixner } 154f6b8ccc1SThomas Gleixner 155a428f72eSPekka Enberg #define SYSRQ_PENDING_NONE 0 156a428f72eSPekka Enberg #define SYSRQ_PENDING_BREAK 1 157a428f72eSPekka Enberg 158a428f72eSPekka Enberg static int sysrq_pending; 159a428f72eSPekka Enberg 16043835ac9SSasha Levin static void serial8250__sysrq(struct kvm *kvm, struct serial8250_device *dev) 161a428f72eSPekka Enberg { 162a428f72eSPekka Enberg dev->lsr |= UART_LSR_DR | UART_LSR_BI; 163*d4b02a37SThomas Gleixner dev->rxbuf[dev->rxcnt++] = 'p'; 164a428f72eSPekka Enberg sysrq_pending = SYSRQ_PENDING_NONE; 165a428f72eSPekka Enberg } 166a428f72eSPekka Enberg 167*d4b02a37SThomas Gleixner static void serial8250__receive(struct kvm *kvm, struct serial8250_device *dev, 168*d4b02a37SThomas Gleixner bool handle_sysrq) 169251cf9a6SPekka Enberg { 170251cf9a6SPekka Enberg int c; 171251cf9a6SPekka Enberg 1728dfae8beSThomas Gleixner /* 173*d4b02a37SThomas Gleixner * If the guest transmitted a full fifo, we clear the 1748dfae8beSThomas Gleixner * TEMT/THRE bits to let the kernel escape from the 8250 1758dfae8beSThomas Gleixner * interrupt handler. We come here only once a ms, so that 176*d4b02a37SThomas Gleixner * should give the kernel the desired pause. That also flushes 177*d4b02a37SThomas Gleixner * the tx fifo to the terminal. 1788dfae8beSThomas Gleixner */ 179*d4b02a37SThomas Gleixner serial8250_flush_tx(dev); 1808dfae8beSThomas Gleixner 181*d4b02a37SThomas Gleixner if (dev->mcr & UART_MCR_LOOP) 182db34045cSPekka Enberg return; 183db34045cSPekka Enberg 184*d4b02a37SThomas Gleixner if ((dev->lsr & UART_LSR_DR) || dev->rxcnt) 185*d4b02a37SThomas Gleixner return; 186*d4b02a37SThomas Gleixner 187*d4b02a37SThomas Gleixner if (handle_sysrq && sysrq_pending) { 18843835ac9SSasha Levin serial8250__sysrq(kvm, dev); 189a428f72eSPekka Enberg return; 190a428f72eSPekka Enberg } 191a428f72eSPekka Enberg 192*d4b02a37SThomas Gleixner while (term_readable(CONSOLE_8250, dev->id) && 193*d4b02a37SThomas Gleixner dev->rxcnt < FIFO_LEN) { 194251cf9a6SPekka Enberg 1951add4b76SSasha Levin c = term_getc(CONSOLE_8250, dev->id); 19605d1a2a6SAsias He 197251cf9a6SPekka Enberg if (c < 0) 198*d4b02a37SThomas Gleixner break; 199*d4b02a37SThomas Gleixner dev->rxbuf[dev->rxcnt++] = c; 200251cf9a6SPekka Enberg dev->lsr |= UART_LSR_DR; 201251cf9a6SPekka Enberg } 202*d4b02a37SThomas Gleixner } 203251cf9a6SPekka Enberg 204f6b8ccc1SThomas Gleixner void serial8250__update_consoles(struct kvm *kvm) 2058bb34e0dSPekka Enberg { 206479de16fSCyrill Gorcunov unsigned int i; 2071add4b76SSasha Levin 208479de16fSCyrill Gorcunov for (i = 0; i < ARRAY_SIZE(devices); i++) { 2091add4b76SSasha Levin struct serial8250_device *dev = &devices[i]; 210934c193bSPekka Enberg 2114ef0f4d6SPekka Enberg mutex_lock(&dev->mutex); 2122932c9ebSPekka Enberg 213*d4b02a37SThomas Gleixner /* Restrict sysrq injection to the first port */ 214*d4b02a37SThomas Gleixner serial8250__receive(kvm, dev, i == 0); 215251cf9a6SPekka Enberg 216f6b8ccc1SThomas Gleixner serial8250_update_irq(kvm, dev); 2172932c9ebSPekka Enberg 2184ef0f4d6SPekka Enberg mutex_unlock(&dev->mutex); 2198bb34e0dSPekka Enberg } 2201add4b76SSasha Levin } 2218bb34e0dSPekka Enberg 22243835ac9SSasha Levin void serial8250__inject_sysrq(struct kvm *kvm) 223a428f72eSPekka Enberg { 224a428f72eSPekka Enberg sysrq_pending = SYSRQ_PENDING_BREAK; 225a428f72eSPekka Enberg } 226a428f72eSPekka Enberg 2273fdf659dSSasha Levin static struct serial8250_device *find_device(u16 port) 228c6a69c61SPekka Enberg { 229c6a69c61SPekka Enberg unsigned int i; 230c6a69c61SPekka Enberg 231c6a69c61SPekka Enberg for (i = 0; i < ARRAY_SIZE(devices); i++) { 232c6a69c61SPekka Enberg struct serial8250_device *dev = &devices[i]; 233c6a69c61SPekka Enberg 234c6a69c61SPekka Enberg if (dev->iobase == (port & ~0x7)) 235c6a69c61SPekka Enberg return dev; 236c6a69c61SPekka Enberg } 237c6a69c61SPekka Enberg return NULL; 238c6a69c61SPekka Enberg } 239c6a69c61SPekka Enberg 240*d4b02a37SThomas Gleixner static bool serial8250_out(struct ioport *ioport, struct kvm *kvm, u16 port, 241*d4b02a37SThomas Gleixner void *data, int size) 24213a7760fSPekka Enberg { 243c6a69c61SPekka Enberg struct serial8250_device *dev; 2443fdf659dSSasha Levin u16 offset; 2452932c9ebSPekka Enberg bool ret = true; 246*d4b02a37SThomas Gleixner char *addr = data; 24746aa8d69SPekka Enberg 248c6a69c61SPekka Enberg dev = find_device(port); 249c6a69c61SPekka Enberg if (!dev) 250c6a69c61SPekka Enberg return false; 251c6a69c61SPekka Enberg 2524ef0f4d6SPekka Enberg mutex_lock(&dev->mutex); 2532932c9ebSPekka Enberg 254c6a69c61SPekka Enberg offset = port - dev->iobase; 255c6a69c61SPekka Enberg 25646aa8d69SPekka Enberg switch (offset) { 257c59fa0c4SThomas Gleixner case UART_TX: 258*d4b02a37SThomas Gleixner if (dev->lcr & UART_LCR_DLAB) { 259c59fa0c4SThomas Gleixner dev->dll = ioport__read8(data); 260*d4b02a37SThomas Gleixner break; 261*d4b02a37SThomas Gleixner } 262*d4b02a37SThomas Gleixner 263*d4b02a37SThomas Gleixner /* Loopback mode */ 264*d4b02a37SThomas Gleixner if (dev->mcr & UART_MCR_LOOP) { 265*d4b02a37SThomas Gleixner if (dev->rxcnt < FIFO_LEN) { 266*d4b02a37SThomas Gleixner dev->rxbuf[dev->rxcnt++] = *addr; 267*d4b02a37SThomas Gleixner dev->lsr |= UART_LSR_DR; 268*d4b02a37SThomas Gleixner } 269*d4b02a37SThomas Gleixner break; 270*d4b02a37SThomas Gleixner } 271*d4b02a37SThomas Gleixner 272*d4b02a37SThomas Gleixner if (dev->txcnt < FIFO_LEN) { 273*d4b02a37SThomas Gleixner dev->txbuf[dev->txcnt++] = *addr; 274*d4b02a37SThomas Gleixner dev->lsr &= ~UART_LSR_TEMT; 275*d4b02a37SThomas Gleixner if (dev->txcnt == FIFO_LEN / 2) 276*d4b02a37SThomas Gleixner dev->lsr &= ~UART_LSR_THRE; 277*d4b02a37SThomas Gleixner } else { 278*d4b02a37SThomas Gleixner /* Should never happpen */ 279*d4b02a37SThomas Gleixner dev->lsr &= ~(UART_LSR_TEMT | UART_LSR_THRE); 28046aa8d69SPekka Enberg } 281369c01c0SPekka Enberg break; 2824e49b05bSCyrill Gorcunov case UART_IER: 283f6b8ccc1SThomas Gleixner if (!(dev->lcr & UART_LCR_DLAB)) 284*d4b02a37SThomas Gleixner dev->ier = ioport__read8(data) & 0x0f; 285f6b8ccc1SThomas Gleixner else 286c59fa0c4SThomas Gleixner dev->dlm = ioport__read8(data); 287c59fa0c4SThomas Gleixner break; 288c59fa0c4SThomas Gleixner case UART_FCR: 289c59fa0c4SThomas Gleixner dev->fcr = ioport__read8(data); 29046aa8d69SPekka Enberg break; 291369c01c0SPekka Enberg case UART_LCR: 292369c01c0SPekka Enberg dev->lcr = ioport__read8(data); 293369c01c0SPekka Enberg break; 294369c01c0SPekka Enberg case UART_MCR: 295369c01c0SPekka Enberg dev->mcr = ioport__read8(data); 296369c01c0SPekka Enberg break; 297369c01c0SPekka Enberg case UART_LSR: 298369c01c0SPekka Enberg /* Factory test */ 299369c01c0SPekka Enberg break; 300369c01c0SPekka Enberg case UART_MSR: 301369c01c0SPekka Enberg /* Not used */ 302369c01c0SPekka Enberg break; 303369c01c0SPekka Enberg case UART_SCR: 304369c01c0SPekka Enberg dev->scr = ioport__read8(data); 305369c01c0SPekka Enberg break; 306369c01c0SPekka Enberg default: 3072932c9ebSPekka Enberg ret = false; 308d2ea115dSThomas Gleixner break; 30946aa8d69SPekka Enberg } 3102932c9ebSPekka Enberg 311f6b8ccc1SThomas Gleixner serial8250_update_irq(kvm, dev); 312f6b8ccc1SThomas Gleixner 3134ef0f4d6SPekka Enberg mutex_unlock(&dev->mutex); 3142932c9ebSPekka Enberg 3152932c9ebSPekka Enberg return ret; 31613a7760fSPekka Enberg } 31713a7760fSPekka Enberg 318*d4b02a37SThomas Gleixner static void serial8250_rx(struct serial8250_device *dev, void *data) 319*d4b02a37SThomas Gleixner { 320*d4b02a37SThomas Gleixner if (dev->rxdone == dev->rxcnt) 321*d4b02a37SThomas Gleixner return; 322*d4b02a37SThomas Gleixner 323*d4b02a37SThomas Gleixner /* Break issued ? */ 324*d4b02a37SThomas Gleixner if (dev->lsr & UART_LSR_BI) { 325*d4b02a37SThomas Gleixner dev->lsr &= ~UART_LSR_BI; 326*d4b02a37SThomas Gleixner ioport__write8(data, 0); 327*d4b02a37SThomas Gleixner return; 328*d4b02a37SThomas Gleixner } 329*d4b02a37SThomas Gleixner 330*d4b02a37SThomas Gleixner ioport__write8(data, dev->rxbuf[dev->rxdone++]); 331*d4b02a37SThomas Gleixner if (dev->rxcnt == dev->rxdone) { 332*d4b02a37SThomas Gleixner dev->lsr &= ~UART_LSR_DR; 333*d4b02a37SThomas Gleixner dev->rxcnt = dev->rxdone = 0; 334*d4b02a37SThomas Gleixner } 335*d4b02a37SThomas Gleixner } 336*d4b02a37SThomas Gleixner 337c9f6a037SXiao Guangrong static bool serial8250_in(struct ioport *ioport, struct kvm *kvm, u16 port, void *data, int size) 33825af6674SPekka Enberg { 339c6a69c61SPekka Enberg struct serial8250_device *dev; 3403fdf659dSSasha Levin u16 offset; 3412932c9ebSPekka Enberg bool ret = true; 34246aa8d69SPekka Enberg 343c6a69c61SPekka Enberg dev = find_device(port); 344c6a69c61SPekka Enberg if (!dev) 345c6a69c61SPekka Enberg return false; 346c6a69c61SPekka Enberg 3474ef0f4d6SPekka Enberg mutex_lock(&dev->mutex); 3482932c9ebSPekka Enberg 349c6a69c61SPekka Enberg offset = port - dev->iobase; 350c6a69c61SPekka Enberg 35146aa8d69SPekka Enberg switch (offset) { 352251cf9a6SPekka Enberg case UART_RX: 353*d4b02a37SThomas Gleixner if (dev->lcr & UART_LCR_DLAB) 354c59fa0c4SThomas Gleixner ioport__write8(data, dev->dll); 355*d4b02a37SThomas Gleixner else 356*d4b02a37SThomas Gleixner serial8250_rx(dev, data); 357369c01c0SPekka Enberg break; 358c59fa0c4SThomas Gleixner case UART_IER: 359c59fa0c4SThomas Gleixner if (dev->lcr & UART_LCR_DLAB) 360c59fa0c4SThomas Gleixner ioport__write8(data, dev->dlm); 361c59fa0c4SThomas Gleixner else 362c59fa0c4SThomas Gleixner ioport__write8(data, dev->ier); 363c59fa0c4SThomas Gleixner break; 364f6b8ccc1SThomas Gleixner case UART_IIR: 365*d4b02a37SThomas Gleixner ioport__write8(data, dev->iir | UART_IIR_TYPE_BITS); 36646aa8d69SPekka Enberg break; 3674e49b05bSCyrill Gorcunov case UART_LCR: 368c6a69c61SPekka Enberg ioport__write8(data, dev->lcr); 36946aa8d69SPekka Enberg break; 3704e49b05bSCyrill Gorcunov case UART_MCR: 371c6a69c61SPekka Enberg ioport__write8(data, dev->mcr); 37246aa8d69SPekka Enberg break; 3734e49b05bSCyrill Gorcunov case UART_LSR: 374c6a69c61SPekka Enberg ioport__write8(data, dev->lsr); 37546aa8d69SPekka Enberg break; 3764e49b05bSCyrill Gorcunov case UART_MSR: 377369c01c0SPekka Enberg ioport__write8(data, dev->msr); 37846aa8d69SPekka Enberg break; 3794e49b05bSCyrill Gorcunov case UART_SCR: 380369c01c0SPekka Enberg ioport__write8(data, dev->scr); 38146aa8d69SPekka Enberg break; 382369c01c0SPekka Enberg default: 3832932c9ebSPekka Enberg ret = false; 384c59fa0c4SThomas Gleixner break; 38525af6674SPekka Enberg } 386f6b8ccc1SThomas Gleixner 387f6b8ccc1SThomas Gleixner serial8250_update_irq(kvm, dev); 388f6b8ccc1SThomas Gleixner 3894ef0f4d6SPekka Enberg mutex_unlock(&dev->mutex); 3902932c9ebSPekka Enberg 3912932c9ebSPekka Enberg return ret; 39213a7760fSPekka Enberg } 39313a7760fSPekka Enberg 39446aa8d69SPekka Enberg static struct ioport_operations serial8250_ops = { 39546aa8d69SPekka Enberg .io_in = serial8250_in, 39646aa8d69SPekka Enberg .io_out = serial8250_out, 397a93ec68bSPekka Enberg }; 398a93ec68bSPekka Enberg 399bc4b0ffeSPekka Enberg static void serial8250__device_init(struct kvm *kvm, struct serial8250_device *dev) 400bc4b0ffeSPekka Enberg { 4013d62dea6SSasha Levin ioport__register(dev->iobase, &serial8250_ops, 8, NULL); 402bc4b0ffeSPekka Enberg kvm__irq_line(kvm, dev->irq, 0); 403bc4b0ffeSPekka Enberg } 404bc4b0ffeSPekka Enberg 405bc4b0ffeSPekka Enberg void serial8250__init(struct kvm *kvm) 40613a7760fSPekka Enberg { 407c6a69c61SPekka Enberg unsigned int i; 408c6a69c61SPekka Enberg 409c6a69c61SPekka Enberg for (i = 0; i < ARRAY_SIZE(devices); i++) { 410c6a69c61SPekka Enberg struct serial8250_device *dev = &devices[i]; 411c6a69c61SPekka Enberg 412bc4b0ffeSPekka Enberg serial8250__device_init(kvm, dev); 413c6a69c61SPekka Enberg } 41413a7760fSPekka Enberg } 415