xref: /kvmtool/arm/aarch64/kvm-cpu.c (revision ca31abf5d9c3453c852b263ccb451751b29b944b)
1 #include "kvm/kvm-cpu.h"
2 #include "kvm/kvm.h"
3 #include "kvm/virtio.h"
4 
5 #include <asm/ptrace.h>
6 #include <linux/bitops.h>
7 
8 #define COMPAT_PSR_F_BIT	0x00000040
9 #define COMPAT_PSR_I_BIT	0x00000080
10 #define COMPAT_PSR_E_BIT	0x00000200
11 #define COMPAT_PSR_MODE_SVC	0x00000013
12 
13 #define SCTLR_EL1_E0E_MASK	(1 << 24)
14 #define SCTLR_EL1_EE_MASK	(1 << 25)
15 
__core_reg_id(__u64 offset)16 static __u64 __core_reg_id(__u64 offset)
17 {
18 	__u64 id = KVM_REG_ARM64 | KVM_REG_ARM_CORE | offset;
19 
20 	if (offset < KVM_REG_ARM_CORE_REG(fp_regs))
21 		id |= KVM_REG_SIZE_U64;
22 	else if (offset < KVM_REG_ARM_CORE_REG(fp_regs.fpsr))
23 		id |= KVM_REG_SIZE_U128;
24 	else
25 		id |= KVM_REG_SIZE_U32;
26 
27 	return id;
28 }
29 
30 #define ARM64_CORE_REG(x) __core_reg_id(KVM_REG_ARM_CORE_REG(x))
31 
kvm_cpu__get_vcpu_mpidr(struct kvm_cpu * vcpu)32 unsigned long kvm_cpu__get_vcpu_mpidr(struct kvm_cpu *vcpu)
33 {
34 	struct kvm_one_reg reg;
35 	u64 mpidr;
36 
37 	reg.id = ARM64_SYS_REG(ARM_CPU_ID, ARM_CPU_ID_MPIDR);
38 	reg.addr = (u64)&mpidr;
39 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
40 		die("KVM_GET_ONE_REG failed (get_mpidr vcpu%ld", vcpu->cpu_id);
41 
42 	return mpidr;
43 }
44 
reset_vcpu_aarch32(struct kvm_cpu * vcpu)45 static void reset_vcpu_aarch32(struct kvm_cpu *vcpu)
46 {
47 	struct kvm *kvm = vcpu->kvm;
48 	struct kvm_one_reg reg;
49 	u64 data;
50 
51 	reg.addr = (u64)&data;
52 
53 	/* pstate = all interrupts masked */
54 	data	= COMPAT_PSR_I_BIT | COMPAT_PSR_F_BIT | COMPAT_PSR_MODE_SVC;
55 	reg.id	= ARM64_CORE_REG(regs.pstate);
56 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
57 		die_perror("KVM_SET_ONE_REG failed (spsr[EL1])");
58 
59 	/* Secondary cores are stopped awaiting PSCI wakeup */
60 	if (vcpu->cpu_id != 0)
61 		return;
62 
63 	/* r0 = 0 */
64 	data	= 0;
65 	reg.id	= ARM64_CORE_REG(regs.regs[0]);
66 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
67 		die_perror("KVM_SET_ONE_REG failed (r0)");
68 
69 	/* r1 = machine type (-1) */
70 	data	= -1;
71 	reg.id	= ARM64_CORE_REG(regs.regs[1]);
72 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
73 		die_perror("KVM_SET_ONE_REG failed (r1)");
74 
75 	/* r2 = physical address of the device tree blob */
76 	data	= kvm->arch.dtb_guest_start;
77 	reg.id	= ARM64_CORE_REG(regs.regs[2]);
78 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
79 		die_perror("KVM_SET_ONE_REG failed (r2)");
80 
81 	/* pc = start of kernel image */
82 	data	= kvm->arch.kern_guest_start;
83 	reg.id	= ARM64_CORE_REG(regs.pc);
84 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
85 		die_perror("KVM_SET_ONE_REG failed (pc)");
86 }
87 
reset_vcpu_aarch64(struct kvm_cpu * vcpu)88 static void reset_vcpu_aarch64(struct kvm_cpu *vcpu)
89 {
90 	struct kvm *kvm = vcpu->kvm;
91 	struct kvm_one_reg reg;
92 	u64 data;
93 
94 	reg.addr = (u64)&data;
95 
96 	/* pstate = all interrupts masked */
97 	data	= PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL1h;
98 	reg.id	= ARM64_CORE_REG(regs.pstate);
99 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
100 		die_perror("KVM_SET_ONE_REG failed (spsr[EL1])");
101 
102 	/* x1...x3 = 0 */
103 	data	= 0;
104 	reg.id	= ARM64_CORE_REG(regs.regs[1]);
105 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
106 		die_perror("KVM_SET_ONE_REG failed (x1)");
107 
108 	reg.id	= ARM64_CORE_REG(regs.regs[2]);
109 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
110 		die_perror("KVM_SET_ONE_REG failed (x2)");
111 
112 	reg.id	= ARM64_CORE_REG(regs.regs[3]);
113 	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
114 		die_perror("KVM_SET_ONE_REG failed (x3)");
115 
116 	/* Secondary cores are stopped awaiting PSCI wakeup */
117 	if (vcpu->cpu_id == 0) {
118 		/* x0 = physical address of the device tree blob */
119 		data	= kvm->arch.dtb_guest_start;
120 		reg.id	= ARM64_CORE_REG(regs.regs[0]);
121 		if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
122 			die_perror("KVM_SET_ONE_REG failed (x0)");
123 
124 		/* pc = start of kernel image */
125 		data	= kvm->arch.kern_guest_start;
126 		reg.id	= ARM64_CORE_REG(regs.pc);
127 		if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
128 			die_perror("KVM_SET_ONE_REG failed (pc)");
129 	}
130 }
131 
kvm_cpu__select_features(struct kvm * kvm,struct kvm_vcpu_init * init)132 void kvm_cpu__select_features(struct kvm *kvm, struct kvm_vcpu_init *init)
133 {
134 	if (kvm->cfg.arch.aarch32_guest) {
135 		if (!kvm__supports_extension(kvm, KVM_CAP_ARM_EL1_32BIT))
136 			die("32bit guests are not supported\n");
137 		init->features[0] |= 1UL << KVM_ARM_VCPU_EL1_32BIT;
138 	}
139 
140 	if (kvm->cfg.arch.has_pmuv3) {
141 		if (!kvm__supports_extension(kvm, KVM_CAP_ARM_PMU_V3))
142 			die("PMUv3 is not supported");
143 		init->features[0] |= 1UL << KVM_ARM_VCPU_PMU_V3;
144 	}
145 
146 	/* Enable pointer authentication if available */
147 	if (kvm__supports_extension(kvm, KVM_CAP_ARM_PTRAUTH_ADDRESS) &&
148 	    kvm__supports_extension(kvm, KVM_CAP_ARM_PTRAUTH_GENERIC)) {
149 		init->features[0] |= 1UL << KVM_ARM_VCPU_PTRAUTH_ADDRESS;
150 		init->features[0] |= 1UL << KVM_ARM_VCPU_PTRAUTH_GENERIC;
151 	}
152 
153 	/* Enable SVE if available */
154 	if (kvm__supports_extension(kvm, KVM_CAP_ARM_SVE))
155 		init->features[0] |= 1UL << KVM_ARM_VCPU_SVE;
156 }
157 
sve_vl_parser(const struct option * opt,const char * arg,int unset)158 int sve_vl_parser(const struct option *opt, const char *arg, int unset)
159 {
160 	struct kvm *kvm = opt->ptr;
161 	unsigned long val;
162 	unsigned int vq;
163 
164 	errno = 0;
165 	val = strtoull(arg, NULL, 10);
166 	if (errno == ERANGE)
167 		die("SVE vector length too large: %s", arg);
168 
169 	if (!val || (val & (val - 1)))
170 		die("SVE vector length isn't power of 2: %s", arg);
171 
172 	vq = val / 128;
173 	if (vq > KVM_ARM64_SVE_VQ_MAX || vq < KVM_ARM64_SVE_VQ_MIN)
174 		die("SVE vector length out of range: %s", arg);
175 
176 	kvm->cfg.arch.sve_max_vq = vq;
177 	return 0;
178 }
179 
vcpu_configure_sve(struct kvm_cpu * vcpu)180 static int vcpu_configure_sve(struct kvm_cpu *vcpu)
181 {
182 	unsigned int max_vq = vcpu->kvm->cfg.arch.sve_max_vq;
183 	int feature = KVM_ARM_VCPU_SVE;
184 
185 	if (max_vq) {
186 		unsigned long vls[KVM_ARM64_SVE_VLS_WORDS];
187 		struct kvm_one_reg reg = {
188 			.id	= KVM_REG_ARM64_SVE_VLS,
189 			.addr	= (u64)&vls,
190 		};
191 		unsigned int vq;
192 
193 		if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg))
194 			die_perror("KVM_GET_ONE_REG failed (KVM_ARM64_SVE_VLS)");
195 
196 		if (!test_bit(max_vq - KVM_ARM64_SVE_VQ_MIN, vls))
197 			die("SVE vector length (%u) not supported", max_vq * 128);
198 
199 		for (vq = KVM_ARM64_SVE_VQ_MAX; vq > max_vq; vq--)
200 			clear_bit(vq - KVM_ARM64_SVE_VQ_MIN, vls);
201 
202 		if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg))
203 			die_perror("KVM_SET_ONE_REG failed (KVM_ARM64_SVE_VLS)");
204 	}
205 
206 	if (ioctl(vcpu->vcpu_fd, KVM_ARM_VCPU_FINALIZE, &feature)) {
207 		pr_err("KVM_ARM_VCPU_FINALIZE: %s", strerror(errno));
208 		return -1;
209 	}
210 
211 	return 0;
212 }
213 
kvm_cpu__configure_features(struct kvm_cpu * vcpu)214 int kvm_cpu__configure_features(struct kvm_cpu *vcpu)
215 {
216 	if (kvm__supports_extension(vcpu->kvm, KVM_CAP_ARM_SVE))
217 		return vcpu_configure_sve(vcpu);
218 
219 	return 0;
220 }
221 
kvm_cpu__reset_vcpu(struct kvm_cpu * vcpu)222 void kvm_cpu__reset_vcpu(struct kvm_cpu *vcpu)
223 {
224 	struct kvm *kvm = vcpu->kvm;
225 	cpu_set_t *affinity;
226 	int ret;
227 
228 	affinity = kvm->arch.vcpu_affinity_cpuset;
229 	if (affinity) {
230 		ret = sched_setaffinity(0, sizeof(cpu_set_t), affinity);
231 		if (ret == -1)
232 			die_perror("sched_setaffinity");
233 	}
234 
235 	if (kvm->cfg.arch.aarch32_guest)
236 		return reset_vcpu_aarch32(vcpu);
237 	else
238 		return reset_vcpu_aarch64(vcpu);
239 }
240 
kvm_cpu__get_endianness(struct kvm_cpu * vcpu)241 int kvm_cpu__get_endianness(struct kvm_cpu *vcpu)
242 {
243 	struct kvm_one_reg reg;
244 	u64 psr;
245 	u64 sctlr;
246 
247 	/*
248 	 * Quoting the definition given by Peter Maydell:
249 	 *
250 	 * "Endianness of the CPU which does the virtio reset at the
251 	 * point when it does that reset"
252 	 *
253 	 * We first check for an AArch32 guest: its endianness can
254 	 * change when using SETEND, which affects the CPSR.E bit.
255 	 *
256 	 * If we're AArch64, use SCTLR_EL1.E0E if access comes from
257 	 * EL0, and SCTLR_EL1.EE if access comes from EL1.
258 	 */
259 	reg.id = ARM64_CORE_REG(regs.pstate);
260 	reg.addr = (u64)&psr;
261 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
262 		die("KVM_GET_ONE_REG failed (spsr[EL1])");
263 
264 	if (psr & PSR_MODE32_BIT)
265 		return (psr & COMPAT_PSR_E_BIT) ? VIRTIO_ENDIAN_BE : VIRTIO_ENDIAN_LE;
266 
267 	reg.id = ARM64_SYS_REG(ARM_CPU_CTRL, ARM_CPU_CTRL_SCTLR_EL1);
268 	reg.addr = (u64)&sctlr;
269 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
270 		die("KVM_GET_ONE_REG failed (SCTLR_EL1)");
271 
272 	if ((psr & PSR_MODE_MASK) == PSR_MODE_EL0t)
273 		sctlr &= SCTLR_EL1_E0E_MASK;
274 	else
275 		sctlr &= SCTLR_EL1_EE_MASK;
276 	return sctlr ? VIRTIO_ENDIAN_BE : VIRTIO_ENDIAN_LE;
277 }
278 
kvm_cpu__show_code(struct kvm_cpu * vcpu)279 void kvm_cpu__show_code(struct kvm_cpu *vcpu)
280 {
281 	struct kvm_one_reg reg;
282 	unsigned long data;
283 	int debug_fd = kvm_cpu__get_debug_fd();
284 
285 	reg.addr = (u64)&data;
286 
287 	dprintf(debug_fd, "\n*pc:\n");
288 	reg.id = ARM64_CORE_REG(regs.pc);
289 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
290 		die("KVM_GET_ONE_REG failed (show_code @ PC)");
291 
292 	kvm__dump_mem(vcpu->kvm, data, 32, debug_fd);
293 
294 	dprintf(debug_fd, "\n*lr:\n");
295 	reg.id = ARM64_CORE_REG(regs.regs[30]);
296 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
297 		die("KVM_GET_ONE_REG failed (show_code @ LR)");
298 
299 	kvm__dump_mem(vcpu->kvm, data, 32, debug_fd);
300 }
301 
kvm_cpu__show_registers(struct kvm_cpu * vcpu)302 void kvm_cpu__show_registers(struct kvm_cpu *vcpu)
303 {
304 	struct kvm_one_reg reg;
305 	unsigned long data;
306 	int debug_fd = kvm_cpu__get_debug_fd();
307 
308 	reg.addr = (u64)&data;
309 	dprintf(debug_fd, "\n Registers:\n");
310 
311 	reg.id		= ARM64_CORE_REG(regs.pc);
312 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
313 		die("KVM_GET_ONE_REG failed (pc)");
314 	dprintf(debug_fd, " PC:    0x%lx\n", data);
315 
316 	reg.id		= ARM64_CORE_REG(regs.pstate);
317 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
318 		die("KVM_GET_ONE_REG failed (pstate)");
319 	dprintf(debug_fd, " PSTATE:    0x%lx\n", data);
320 
321 	reg.id		= ARM64_CORE_REG(sp_el1);
322 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
323 		die("KVM_GET_ONE_REG failed (sp_el1)");
324 	dprintf(debug_fd, " SP_EL1:    0x%lx\n", data);
325 
326 	reg.id		= ARM64_CORE_REG(regs.regs[30]);
327 	if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
328 		die("KVM_GET_ONE_REG failed (lr)");
329 	dprintf(debug_fd, " LR:    0x%lx\n", data);
330 }
331