xref: /kvm-unit-tests/s390x/snippets/asm/pv-icpt-112.S (revision 90cacd85c6ad50f032a3fe95586fab4f2335b93d)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Intercept 112 PV snippet
4 *
5 * We setup and share a prefix at 0x0 and 0x8000 which the hypervisor
6 * test will try to export and then execute a SIE entry which
7 * should result in a 112 SIE intercept.
8 *
9 * Copyright (c) 2023 IBM Corp
10 *
11 * Authors:
12 *  Janosch Frank <frankja@linux.ibm.com>
13 */
14#include <asm/asm-offsets.h>
15
16.section .text
17xgr	%r0, %r0
18xgr	%r1, %r1
19
20/* Let's tell the hypervisor we're ready to start */
21diag	0,0,0x44
22
23/*
24 * Hypervisor will export the lowcore and try a SIE entry which should
25 * result in a 112. It will then import the lowcore again and we
26 * should continue with the code below.
27 */
28
29/* Share the lowcore */
30larl	%r1, share
31.insn rrf,0xB9A40000,0,1,0,0
32xgr	%r1, %r1
33
34/*  Let's tell the hypervisor we're ready to start shared testing */
35diag	0,0,0x44
36
37/* Host: icpt:  PV instruction diag 0x44 */
38/* Host: icpt:  112 */
39
40/* Copy the invalid PGM new PSW to the new lowcore */
41larl	%r1, prfx
42l	%r2, 0(%r1)
43mvc     GEN_LC_PGM_NEW_PSW(16, %r2), GEN_LC_PGM_NEW_PSW(%r0)
44
45/* Change the prefix to 0x8000 and re-try */
46xgr	%r1, %r1
47xgr	%r2, %r2
48larl	%r2, prfx
49spx	0(%r2)
50
51/* Host: icpt:  PV instruction notification SPX*/
52/* Host: icpt:  112 */
53
54/* Share the new lowcore */
55larl	%r3, share_addr
56stg	%r2, 0(%r3)
57larl	%r2, share
58.insn rrf,0xB9A40000,0,2,0,0
59
60/* Let's tell the hypervisor we're ready to start shared testing */
61diag	0,0,0x44
62
63/* Host: icpt:  PV instruction diag 0x44 */
64/* Host: icpt:  112 */
65
66/* Test re-entry */
67lghi	%r1, 42
68diag	1,0,0x9c
69
70/* Host: icpt:  PV instruction diag 0x9c */
71
72.align 8
73share:
74	.quad 0x0030100000000000
75	.quad 0x0, 0x0, 0x0
76share_addr:
77	.quad 0x0
78	.quad 0x0
79.align 4
80prfx:
81	.long 0x00008000
82