xref: /kvm-unit-tests/lib/x86/apic.h (revision 0172b95c40115affde12a27e957d70df2edea967)
1 #ifndef CFLAT_APIC_H
2 #define CFLAT_APIC_H
3 
4 #include <stdint.h>
5 #include "apic-defs.h"
6 
7 typedef struct {
8     uint8_t vector;
9     uint8_t delivery_mode:3;
10     uint8_t dest_mode:1;
11     uint8_t delivery_status:1;
12     uint8_t polarity:1;
13     uint8_t remote_irr:1;
14     uint8_t trig_mode:1;
15     uint8_t mask:1;
16     uint8_t reserve:7;
17     uint8_t reserved[4];
18     uint8_t dest_id;
19 } ioapic_redir_entry_t;
20 
21 typedef enum trigger_mode {
22 	TRIGGER_EDGE = 0,
23 	TRIGGER_LEVEL,
24 	TRIGGER_MAX,
25 } trigger_mode_t;
26 
27 void mask_pic_interrupts(void);
28 
29 void eoi(void);
30 uint8_t apic_get_tpr(void);
31 void apic_set_tpr(uint8_t tpr);
32 
33 void ioapic_write_redir(unsigned line, ioapic_redir_entry_t e);
34 void ioapic_write_reg(unsigned reg, uint32_t value);
35 ioapic_redir_entry_t ioapic_read_redir(unsigned line);
36 uint32_t ioapic_read_reg(unsigned reg);
37 
38 void set_mask(unsigned line, int mask);
39 
40 void enable_apic(void);
41 uint32_t apic_read(unsigned reg);
42 bool apic_read_bit(unsigned reg, int n);
43 void apic_write(unsigned reg, uint32_t val);
44 void apic_icr_write(uint32_t val, uint32_t dest);
45 uint32_t apic_id(void);
46 
47 int enable_x2apic(void);
48 void reset_apic(void);
49 
50 #endif
51