xref: /kvm-unit-tests/lib/riscv/asm/isa.h (revision 48d5952451de62a4db23cf73024f702cf1a64fc3)
1*db0ae91cSAndrew Jones /* SPDX-License-Identifier: GPL-2.0-only */
2*db0ae91cSAndrew Jones #ifndef _ASMRISCV_ISA_H_
3*db0ae91cSAndrew Jones #define _ASMRISCV_ISA_H_
4*db0ae91cSAndrew Jones #include <bitops.h>
5*db0ae91cSAndrew Jones #include <asm/setup.h>
6*db0ae91cSAndrew Jones 
7*db0ae91cSAndrew Jones /*
8*db0ae91cSAndrew Jones  * We assume and use several extensions, such as Zicsr and Zifencei.
9*db0ae91cSAndrew Jones  * Here we only track extensions which we don't assume and the
10*db0ae91cSAndrew Jones  * framework may want to use. Unit tests may check for extensions
11*db0ae91cSAndrew Jones  * by name not tracked here with cpu_has_extension_name()
12*db0ae91cSAndrew Jones  */
13*db0ae91cSAndrew Jones enum {
14*db0ae91cSAndrew Jones 	ISA_SSTC,
15*db0ae91cSAndrew Jones 	ISA_MAX,
16*db0ae91cSAndrew Jones };
17*db0ae91cSAndrew Jones _Static_assert(ISA_MAX <= __riscv_xlen, "Need to increase thread_info.isa");
18*db0ae91cSAndrew Jones 
cpu_has_extension(int cpu,int ext)19*db0ae91cSAndrew Jones static inline bool cpu_has_extension(int cpu, int ext)
20*db0ae91cSAndrew Jones {
21*db0ae91cSAndrew Jones 	return test_bit(ext, cpus[cpu].isa);
22*db0ae91cSAndrew Jones }
23*db0ae91cSAndrew Jones 
24*db0ae91cSAndrew Jones bool cpu_has_extension_name(int cpu, const char *ext);
25*db0ae91cSAndrew Jones 
has_ext(const char * ext)26*db0ae91cSAndrew Jones static inline bool has_ext(const char *ext)
27*db0ae91cSAndrew Jones {
28*db0ae91cSAndrew Jones 	return cpu_has_extension_name(current_thread_info()->cpu, ext);
29*db0ae91cSAndrew Jones }
30*db0ae91cSAndrew Jones 
31*db0ae91cSAndrew Jones void isa_init(struct thread_info *info);
32*db0ae91cSAndrew Jones 
33*db0ae91cSAndrew Jones #endif /* _ASMRISCV_ISA_H_ */
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