xref: /kvm-unit-tests/lib/riscv/asm/isa.h (revision 48d5952451de62a4db23cf73024f702cf1a64fc3)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 #ifndef _ASMRISCV_ISA_H_
3 #define _ASMRISCV_ISA_H_
4 #include <bitops.h>
5 #include <asm/setup.h>
6 
7 /*
8  * We assume and use several extensions, such as Zicsr and Zifencei.
9  * Here we only track extensions which we don't assume and the
10  * framework may want to use. Unit tests may check for extensions
11  * by name not tracked here with cpu_has_extension_name()
12  */
13 enum {
14 	ISA_SSTC,
15 	ISA_MAX,
16 };
17 _Static_assert(ISA_MAX <= __riscv_xlen, "Need to increase thread_info.isa");
18 
cpu_has_extension(int cpu,int ext)19 static inline bool cpu_has_extension(int cpu, int ext)
20 {
21 	return test_bit(ext, cpus[cpu].isa);
22 }
23 
24 bool cpu_has_extension_name(int cpu, const char *ext);
25 
has_ext(const char * ext)26 static inline bool has_ext(const char *ext)
27 {
28 	return cpu_has_extension_name(current_thread_info()->cpu, ext);
29 }
30 
31 void isa_init(struct thread_info *info);
32 
33 #endif /* _ASMRISCV_ISA_H_ */
34