1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 #ifndef _ASMRISCV_CSR_H_ 3 #define _ASMRISCV_CSR_H_ 4 #include <linux/const.h> 5 6 #define CSR_SSTATUS 0x100 7 #define CSR_SIE 0x104 8 #define CSR_STVEC 0x105 9 #define CSR_SSCRATCH 0x140 10 #define CSR_SEPC 0x141 11 #define CSR_SCAUSE 0x142 12 #define CSR_STVAL 0x143 13 #define CSR_SIP 0x144 14 #define CSR_STIMECMP 0x14d 15 #define CSR_STIMECMPH 0x15d 16 #define CSR_SATP 0x180 17 #define CSR_TIME 0xc01 18 19 #define SR_SIE _AC(0x00000002, UL) 20 21 /* Exception cause high bit - is an interrupt if set */ 22 #define CAUSE_IRQ_FLAG (_AC(1, UL) << (__riscv_xlen - 1)) 23 24 /* Exception causes */ 25 #define EXC_INST_MISALIGNED 0 26 #define EXC_INST_ACCESS 1 27 #define EXC_INST_ILLEGAL 2 28 #define EXC_BREAKPOINT 3 29 #define EXC_LOAD_MISALIGNED 4 30 #define EXC_LOAD_ACCESS 5 31 #define EXC_STORE_MISALIGNED 6 32 #define EXC_STORE_ACCESS 7 33 #define EXC_SYSCALL 8 34 #define EXC_HYPERVISOR_SYSCALL 9 35 #define EXC_SUPERVISOR_SYSCALL 10 36 #define EXC_INST_PAGE_FAULT 12 37 #define EXC_LOAD_PAGE_FAULT 13 38 #define EXC_STORE_PAGE_FAULT 15 39 #define EXC_INST_GUEST_PAGE_FAULT 20 40 #define EXC_LOAD_GUEST_PAGE_FAULT 21 41 #define EXC_VIRTUAL_INST_FAULT 22 42 #define EXC_STORE_GUEST_PAGE_FAULT 23 43 44 /* Interrupt causes */ 45 #define IRQ_S_SOFT 1 46 #define IRQ_VS_SOFT 2 47 #define IRQ_S_TIMER 5 48 #define IRQ_VS_TIMER 6 49 #define IRQ_S_EXT 9 50 #define IRQ_VS_EXT 10 51 #define IRQ_S_GEXT 12 52 #define IRQ_PMU_OVF 13 53 54 #define IE_SSIE (_AC(1, UL) << IRQ_S_SOFT) 55 #define IE_TIE (_AC(1, UL) << IRQ_S_TIMER) 56 57 #define IP_TIP IE_TIE 58 59 #ifndef __ASSEMBLY__ 60 61 #define csr_swap(csr, val) \ 62 ({ \ 63 unsigned long __v = (unsigned long)(val); \ 64 __asm__ __volatile__ ("csrrw %0, " __ASM_STR(csr) ", %1"\ 65 : "=r" (__v) : "rK" (__v) \ 66 : "memory"); \ 67 __v; \ 68 }) 69 70 #define csr_read(csr) \ 71 ({ \ 72 register unsigned long __v; \ 73 __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \ 74 : "=r" (__v) : \ 75 : "memory"); \ 76 __v; \ 77 }) 78 79 #define csr_write(csr, val) \ 80 ({ \ 81 unsigned long __v = (unsigned long)(val); \ 82 __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \ 83 : : "rK" (__v) \ 84 : "memory"); \ 85 }) 86 87 #define csr_read_set(csr, val) \ 88 ({ \ 89 unsigned long __v = (unsigned long)(val); \ 90 __asm__ __volatile__ ("csrrs %0, " __ASM_STR(csr) ", %1"\ 91 : "=r" (__v) : "rK" (__v) \ 92 : "memory"); \ 93 __v; \ 94 }) 95 96 #define csr_set(csr, val) \ 97 ({ \ 98 unsigned long __v = (unsigned long)(val); \ 99 __asm__ __volatile__ ("csrs " __ASM_STR(csr) ", %0" \ 100 : : "rK" (__v) \ 101 : "memory"); \ 102 }) 103 104 #define csr_read_clear(csr, val) \ 105 ({ \ 106 unsigned long __v = (unsigned long)(val); \ 107 __asm__ __volatile__ ("csrrc %0, " __ASM_STR(csr) ", %1"\ 108 : "=r" (__v) : "rK" (__v) \ 109 : "memory"); \ 110 __v; \ 111 }) 112 113 #define csr_clear(csr, val) \ 114 ({ \ 115 unsigned long __v = (unsigned long)(val); \ 116 __asm__ __volatile__ ("csrc " __ASM_STR(csr) ", %0" \ 117 : : "rK" (__v) \ 118 : "memory"); \ 119 }) 120 121 #endif /* !__ASSEMBLY__ */ 122 #endif /* _ASMRISCV_CSR_H_ */ 123