1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 #ifndef _ASMRISCV_CSR_H_ 3 #define _ASMRISCV_CSR_H_ 4 #include <linux/const.h> 5 6 #define CSR_SSTATUS 0x100 7 #define CSR_SIE 0x104 8 #define CSR_STVEC 0x105 9 #define CSR_SSCRATCH 0x140 10 #define CSR_SEPC 0x141 11 #define CSR_SCAUSE 0x142 12 #define CSR_STVAL 0x143 13 #define CSR_SIP 0x144 14 #define CSR_STIMECMP 0x14d 15 #define CSR_STIMECMPH 0x15d 16 #define CSR_SATP 0x180 17 #define CSR_TIME 0xc01 18 19 #define SR_SIE _AC(0x00000002, UL) 20 #define SR_SPP _AC(0x00000100, UL) 21 22 /* Exception cause high bit - is an interrupt if set */ 23 #define CAUSE_IRQ_FLAG (_AC(1, UL) << (__riscv_xlen - 1)) 24 25 /* Exception causes */ 26 #define EXC_INST_MISALIGNED 0 27 #define EXC_INST_ACCESS 1 28 #define EXC_INST_ILLEGAL 2 29 #define EXC_BREAKPOINT 3 30 #define EXC_LOAD_MISALIGNED 4 31 #define EXC_LOAD_ACCESS 5 32 #define EXC_STORE_MISALIGNED 6 33 #define EXC_STORE_ACCESS 7 34 #define EXC_SYSCALL 8 35 #define EXC_HYPERVISOR_SYSCALL 9 36 #define EXC_SUPERVISOR_SYSCALL 10 37 #define EXC_INST_PAGE_FAULT 12 38 #define EXC_LOAD_PAGE_FAULT 13 39 #define EXC_STORE_PAGE_FAULT 15 40 #define EXC_INST_GUEST_PAGE_FAULT 20 41 #define EXC_LOAD_GUEST_PAGE_FAULT 21 42 #define EXC_VIRTUAL_INST_FAULT 22 43 #define EXC_STORE_GUEST_PAGE_FAULT 23 44 45 /* Interrupt causes */ 46 #define IRQ_S_SOFT 1 47 #define IRQ_VS_SOFT 2 48 #define IRQ_S_TIMER 5 49 #define IRQ_VS_TIMER 6 50 #define IRQ_S_EXT 9 51 #define IRQ_VS_EXT 10 52 #define IRQ_S_GEXT 12 53 #define IRQ_PMU_OVF 13 54 55 #define IE_SSIE (_AC(1, UL) << IRQ_S_SOFT) 56 #define IE_TIE (_AC(1, UL) << IRQ_S_TIMER) 57 58 #define IP_TIP IE_TIE 59 60 #ifndef __ASSEMBLER__ 61 62 #define csr_swap(csr, val) \ 63 ({ \ 64 unsigned long __v = (unsigned long)(val); \ 65 __asm__ __volatile__ ("csrrw %0, " __ASM_STR(csr) ", %1"\ 66 : "=r" (__v) : "rK" (__v) \ 67 : "memory"); \ 68 __v; \ 69 }) 70 71 #define csr_read(csr) \ 72 ({ \ 73 register unsigned long __v; \ 74 __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \ 75 : "=r" (__v) : \ 76 : "memory"); \ 77 __v; \ 78 }) 79 80 #define csr_write(csr, val) \ 81 ({ \ 82 unsigned long __v = (unsigned long)(val); \ 83 __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \ 84 : : "rK" (__v) \ 85 : "memory"); \ 86 }) 87 88 #define csr_read_set(csr, val) \ 89 ({ \ 90 unsigned long __v = (unsigned long)(val); \ 91 __asm__ __volatile__ ("csrrs %0, " __ASM_STR(csr) ", %1"\ 92 : "=r" (__v) : "rK" (__v) \ 93 : "memory"); \ 94 __v; \ 95 }) 96 97 #define csr_set(csr, val) \ 98 ({ \ 99 unsigned long __v = (unsigned long)(val); \ 100 __asm__ __volatile__ ("csrs " __ASM_STR(csr) ", %0" \ 101 : : "rK" (__v) \ 102 : "memory"); \ 103 }) 104 105 #define csr_read_clear(csr, val) \ 106 ({ \ 107 unsigned long __v = (unsigned long)(val); \ 108 __asm__ __volatile__ ("csrrc %0, " __ASM_STR(csr) ", %1"\ 109 : "=r" (__v) : "rK" (__v) \ 110 : "memory"); \ 111 __v; \ 112 }) 113 114 #define csr_clear(csr, val) \ 115 ({ \ 116 unsigned long __v = (unsigned long)(val); \ 117 __asm__ __volatile__ ("csrc " __ASM_STR(csr) ", %0" \ 118 : : "rK" (__v) \ 119 : "memory"); \ 120 }) 121 122 #endif /* !__ASSEMBLER__ */ 123 #endif /* _ASMRISCV_CSR_H_ */ 124