xref: /kvm-unit-tests/lib/riscv/asm/csr.h (revision c20c0aa775dafe135a8ab800cda5aeee854628ce)
1bd744d46SAndrew Jones /* SPDX-License-Identifier: GPL-2.0-only */
2bd744d46SAndrew Jones #ifndef _ASMRISCV_CSR_H_
3bd744d46SAndrew Jones #define _ASMRISCV_CSR_H_
422f287f4SAndrew Jones #include <linux/const.h>
5bd744d46SAndrew Jones 
6386561f8SAndrew Jones #define CSR_SSTATUS		0x100
7386561f8SAndrew Jones #define CSR_STVEC		0x105
8bd744d46SAndrew Jones #define CSR_SSCRATCH		0x140
9386561f8SAndrew Jones #define CSR_SEPC		0x141
10386561f8SAndrew Jones #define CSR_SCAUSE		0x142
11386561f8SAndrew Jones #define CSR_STVAL		0x143
12ad435a71SAndrew Jones #define CSR_SATP		0x180
13386561f8SAndrew Jones 
14a3c0b550SAndrew Jones #define SR_SIE			_AC(0x00000002, UL)
15a3c0b550SAndrew Jones 
16386561f8SAndrew Jones /* Exception cause high bit - is an interrupt if set */
17386561f8SAndrew Jones #define CAUSE_IRQ_FLAG		(_AC(1, UL) << (__riscv_xlen - 1))
18386561f8SAndrew Jones 
19386561f8SAndrew Jones /* Exception causes */
20386561f8SAndrew Jones #define EXC_INST_MISALIGNED	0
21386561f8SAndrew Jones #define EXC_INST_ACCESS		1
22386561f8SAndrew Jones #define EXC_INST_ILLEGAL	2
23386561f8SAndrew Jones #define EXC_BREAKPOINT		3
24386561f8SAndrew Jones #define EXC_LOAD_MISALIGNED	4
25386561f8SAndrew Jones #define EXC_LOAD_ACCESS		5
26386561f8SAndrew Jones #define EXC_STORE_MISALIGNED	6
27386561f8SAndrew Jones #define EXC_STORE_ACCESS	7
28386561f8SAndrew Jones #define EXC_SYSCALL		8
29386561f8SAndrew Jones #define EXC_HYPERVISOR_SYSCALL	9
30386561f8SAndrew Jones #define EXC_SUPERVISOR_SYSCALL	10
31386561f8SAndrew Jones #define EXC_INST_PAGE_FAULT	12
32386561f8SAndrew Jones #define EXC_LOAD_PAGE_FAULT	13
33386561f8SAndrew Jones #define EXC_STORE_PAGE_FAULT	15
34386561f8SAndrew Jones #define EXC_INST_GUEST_PAGE_FAULT	20
35386561f8SAndrew Jones #define EXC_LOAD_GUEST_PAGE_FAULT	21
36386561f8SAndrew Jones #define EXC_VIRTUAL_INST_FAULT		22
37386561f8SAndrew Jones #define EXC_STORE_GUEST_PAGE_FAULT	23
38bd744d46SAndrew Jones 
39*c20c0aa7SJames Raphael Tiovalen /* Interrupt causes */
40*c20c0aa7SJames Raphael Tiovalen #define IRQ_S_SOFT		1
41*c20c0aa7SJames Raphael Tiovalen #define IRQ_VS_SOFT		2
42*c20c0aa7SJames Raphael Tiovalen #define IRQ_S_TIMER		5
43*c20c0aa7SJames Raphael Tiovalen #define IRQ_VS_TIMER		6
44*c20c0aa7SJames Raphael Tiovalen #define IRQ_S_EXT		9
45*c20c0aa7SJames Raphael Tiovalen #define IRQ_VS_EXT		10
46*c20c0aa7SJames Raphael Tiovalen #define IRQ_S_GEXT		12
47*c20c0aa7SJames Raphael Tiovalen #define IRQ_PMU_OVF		13
48*c20c0aa7SJames Raphael Tiovalen 
4922f287f4SAndrew Jones #ifndef __ASSEMBLY__
5022f287f4SAndrew Jones 
5122f287f4SAndrew Jones #define csr_swap(csr, val)					\
5222f287f4SAndrew Jones ({								\
5322f287f4SAndrew Jones 	unsigned long __v = (unsigned long)(val);		\
5422f287f4SAndrew Jones 	__asm__ __volatile__ ("csrrw %0, " __ASM_STR(csr) ", %1"\
5522f287f4SAndrew Jones 				: "=r" (__v) : "rK" (__v)	\
5622f287f4SAndrew Jones 				: "memory");			\
5722f287f4SAndrew Jones 	__v;							\
5822f287f4SAndrew Jones })
5922f287f4SAndrew Jones 
6022f287f4SAndrew Jones #define csr_read(csr)						\
6122f287f4SAndrew Jones ({								\
6222f287f4SAndrew Jones 	register unsigned long __v;				\
6322f287f4SAndrew Jones 	__asm__ __volatile__ ("csrr %0, " __ASM_STR(csr)	\
6422f287f4SAndrew Jones 				: "=r" (__v) :			\
6522f287f4SAndrew Jones 				: "memory");			\
6622f287f4SAndrew Jones 	__v;							\
6722f287f4SAndrew Jones })
6822f287f4SAndrew Jones 
6922f287f4SAndrew Jones #define csr_write(csr, val)					\
7022f287f4SAndrew Jones ({								\
7122f287f4SAndrew Jones 	unsigned long __v = (unsigned long)(val);		\
7222f287f4SAndrew Jones 	__asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0"	\
7322f287f4SAndrew Jones 				: : "rK" (__v)			\
7422f287f4SAndrew Jones 				: "memory");			\
7522f287f4SAndrew Jones })
7622f287f4SAndrew Jones 
7722f287f4SAndrew Jones #define csr_read_set(csr, val)					\
7822f287f4SAndrew Jones ({								\
7922f287f4SAndrew Jones 	unsigned long __v = (unsigned long)(val);		\
8022f287f4SAndrew Jones 	__asm__ __volatile__ ("csrrs %0, " __ASM_STR(csr) ", %1"\
8122f287f4SAndrew Jones 				: "=r" (__v) : "rK" (__v)	\
8222f287f4SAndrew Jones 				: "memory");			\
8322f287f4SAndrew Jones 	__v;							\
8422f287f4SAndrew Jones })
8522f287f4SAndrew Jones 
8622f287f4SAndrew Jones #define csr_set(csr, val)					\
8722f287f4SAndrew Jones ({								\
8822f287f4SAndrew Jones 	unsigned long __v = (unsigned long)(val);		\
8922f287f4SAndrew Jones 	__asm__ __volatile__ ("csrs " __ASM_STR(csr) ", %0"	\
9022f287f4SAndrew Jones 				: : "rK" (__v)			\
9122f287f4SAndrew Jones 				: "memory");			\
9222f287f4SAndrew Jones })
9322f287f4SAndrew Jones 
9422f287f4SAndrew Jones #define csr_read_clear(csr, val)				\
9522f287f4SAndrew Jones ({								\
9622f287f4SAndrew Jones 	unsigned long __v = (unsigned long)(val);		\
9722f287f4SAndrew Jones 	__asm__ __volatile__ ("csrrc %0, " __ASM_STR(csr) ", %1"\
9822f287f4SAndrew Jones 				: "=r" (__v) : "rK" (__v)	\
9922f287f4SAndrew Jones 				: "memory");			\
10022f287f4SAndrew Jones 	__v;							\
10122f287f4SAndrew Jones })
10222f287f4SAndrew Jones 
10322f287f4SAndrew Jones #define csr_clear(csr, val)					\
10422f287f4SAndrew Jones ({								\
10522f287f4SAndrew Jones 	unsigned long __v = (unsigned long)(val);		\
10622f287f4SAndrew Jones 	__asm__ __volatile__ ("csrc " __ASM_STR(csr) ", %0"	\
10722f287f4SAndrew Jones 				: : "rK" (__v)			\
10822f287f4SAndrew Jones 				: "memory");			\
10922f287f4SAndrew Jones })
11022f287f4SAndrew Jones 
11122f287f4SAndrew Jones #endif /* !__ASSEMBLY__ */
112bd744d46SAndrew Jones #endif /* _ASMRISCV_CSR_H_ */
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