1*bd744d46SAndrew Jones /* SPDX-License-Identifier: GPL-2.0-only */ 2*bd744d46SAndrew Jones #ifndef _ASMRISCV_BARRIER_H_ 3*bd744d46SAndrew Jones #define _ASMRISCV_BARRIER_H_ 4*bd744d46SAndrew Jones 5*bd744d46SAndrew Jones #define RISCV_FENCE(p, s) \ 6*bd744d46SAndrew Jones __asm__ __volatile__ ("fence " #p "," #s : : : "memory") 7*bd744d46SAndrew Jones 8*bd744d46SAndrew Jones /* These barriers need to enforce ordering on both devices or memory. */ 9*bd744d46SAndrew Jones #define mb() RISCV_FENCE(iorw,iorw) 10*bd744d46SAndrew Jones #define rmb() RISCV_FENCE(ir,ir) 11*bd744d46SAndrew Jones #define wmb() RISCV_FENCE(ow,ow) 12*bd744d46SAndrew Jones 13*bd744d46SAndrew Jones #endif /* _ASMRISCV_BARRIER_H_ */ 14