19c5e1913SNicholas Piggin #ifndef _ASMPOWERPC_REG_H 29c5e1913SNicholas Piggin #define _ASMPOWERPC_REG_H 39c5e1913SNicholas Piggin 49c5e1913SNicholas Piggin #include <linux/const.h> 59c5e1913SNicholas Piggin 69c5e1913SNicholas Piggin #define UL(x) _AC(x, UL) 79c5e1913SNicholas Piggin 800af1c84SNicholas Piggin #define SPR_DSISR 0x012 900af1c84SNicholas Piggin #define SPR_DAR 0x013 1000af1c84SNicholas Piggin #define SPR_DEC 0x016 118f6290f0SNicholas Piggin #define SPR_SRR0 0x01a 128f6290f0SNicholas Piggin #define SPR_SRR1 0x01b 1300af1c84SNicholas Piggin #define SRR1_PREFIX UL(0x20000000) 1400af1c84SNicholas Piggin #define SPR_FSCR 0x099 1500af1c84SNicholas Piggin #define FSCR_PREFIX UL(0x2000) 1600af1c84SNicholas Piggin #define SPR_HFSCR 0x0be 179c5e1913SNicholas Piggin #define SPR_TB 0x10c 189c5e1913SNicholas Piggin #define SPR_SPRG0 0x110 199c5e1913SNicholas Piggin #define SPR_SPRG1 0x111 209c5e1913SNicholas Piggin #define SPR_SPRG2 0x112 219c5e1913SNicholas Piggin #define SPR_SPRG3 0x113 22*c76b0d0aSNicholas Piggin #define SPR_TBU40 0x11e 239c5e1913SNicholas Piggin #define SPR_PVR 0x11f 249c5e1913SNicholas Piggin #define PVR_VERSION_MASK UL(0xffff0000) 259c5e1913SNicholas Piggin #define PVR_VER_970 UL(0x00390000) 269c5e1913SNicholas Piggin #define PVR_VER_970FX UL(0x003c0000) 279c5e1913SNicholas Piggin #define PVR_VER_970MP UL(0x00440000) 289c5e1913SNicholas Piggin #define PVR_VER_POWER8E UL(0x004b0000) 299c5e1913SNicholas Piggin #define PVR_VER_POWER8NVL UL(0x004c0000) 309c5e1913SNicholas Piggin #define PVR_VER_POWER8 UL(0x004d0000) 319c5e1913SNicholas Piggin #define PVR_VER_POWER9 UL(0x004e0000) 329c5e1913SNicholas Piggin #define PVR_VER_POWER10 UL(0x00800000) 3300af1c84SNicholas Piggin #define SPR_HDEC 0x136 349c5e1913SNicholas Piggin #define SPR_HSRR0 0x13a 359c5e1913SNicholas Piggin #define SPR_HSRR1 0x13b 3600af1c84SNicholas Piggin #define SPR_LPCR 0x13e 3700af1c84SNicholas Piggin #define LPCR_HDICE UL(0x1) 3800af1c84SNicholas Piggin #define SPR_HEIR 0x153 39d499b05fSNicholas Piggin #define SPR_MMCR0 0x31b 40d499b05fSNicholas Piggin #define MMCR0_FC UL(0x80000000) 41d499b05fSNicholas Piggin #define MMCR0_PMAE UL(0x04000000) 42d499b05fSNicholas Piggin #define MMCR0_PMAO UL(0x00000080) 4300af1c84SNicholas Piggin #define SPR_SIAR 0x31c 449c5e1913SNicholas Piggin 459c5e1913SNicholas Piggin /* Machine State Register definitions: */ 46610c5a9cSNicholas Piggin #define MSR_LE_BIT 0 479c5e1913SNicholas Piggin #define MSR_EE_BIT 15 /* External Interrupts Enable */ 48610c5a9cSNicholas Piggin #define MSR_HV_BIT 60 /* Hypervisor mode */ 499c5e1913SNicholas Piggin #define MSR_SF_BIT 63 /* 64-bit mode */ 509c5e1913SNicholas Piggin 5100af1c84SNicholas Piggin #define MSR_DR UL(0x0010) 5200af1c84SNicholas Piggin #define MSR_IR UL(0x0020) 5300af1c84SNicholas Piggin #define MSR_BE UL(0x0200) /* Branch Trace Enable */ 5400af1c84SNicholas Piggin #define MSR_SE UL(0x0400) /* Single Step Enable */ 5500af1c84SNicholas Piggin #define MSR_EE UL(0x8000) 56610c5a9cSNicholas Piggin #define MSR_ME UL(0x1000) 57610c5a9cSNicholas Piggin 589c5e1913SNicholas Piggin #endif 59