1 #ifndef _ASMARM_PROCESSOR_H_ 2 #define _ASMARM_PROCESSOR_H_ 3 /* 4 * Copyright (C) 2014, Red Hat Inc, Andrew Jones <drjones@redhat.com> 5 * 6 * This work is licensed under the terms of the GNU LGPL, version 2. 7 */ 8 #include <asm/ptrace.h> 9 #include <asm/sysreg.h> 10 #include <asm/barrier.h> 11 12 enum vector { 13 EXCPTN_RST, 14 EXCPTN_UND, 15 EXCPTN_SVC, 16 EXCPTN_PABT, 17 EXCPTN_DABT, 18 EXCPTN_ADDREXCPTN, 19 EXCPTN_IRQ, 20 EXCPTN_FIQ, 21 EXCPTN_MAX, 22 }; 23 24 typedef void (*exception_fn)(struct pt_regs *); 25 extern void install_exception_handler(enum vector v, exception_fn fn); 26 27 extern void show_regs(struct pt_regs *regs); 28 29 static inline unsigned long current_cpsr(void) 30 { 31 unsigned long cpsr; 32 asm volatile("mrs %0, cpsr" : "=r" (cpsr)); 33 return cpsr; 34 } 35 36 #define current_mode() (current_cpsr() & MODE_MASK) 37 38 static inline void local_irq_enable(void) 39 { 40 asm volatile("cpsie i" : : : "memory", "cc"); 41 } 42 43 static inline void local_irq_disable(void) 44 { 45 asm volatile("cpsid i" : : : "memory", "cc"); 46 } 47 48 #define MPIDR __ACCESS_CP15(c0, 0, c0, 5) 49 static inline uint64_t get_mpidr(void) 50 { 51 return read_sysreg(MPIDR); 52 } 53 54 #define MPIDR_HWID_BITMASK 0xffffff 55 extern int mpidr_to_cpu(uint64_t mpidr); 56 57 #define MPIDR_LEVEL_SHIFT(level) \ 58 (((1 << level) >> 1) << 3) 59 #define MPIDR_AFFINITY_LEVEL(mpidr, level) \ 60 ((mpidr >> MPIDR_LEVEL_SHIFT(level)) & 0xff) 61 62 extern void start_usr(void (*func)(void *arg), void *arg, unsigned long sp_usr); 63 extern bool is_user(void); 64 65 #define CNTVCT __ACCESS_CP15_64(1, c14) 66 #define CNTFRQ __ACCESS_CP15(c14, 0, c0, 0) 67 68 static inline u64 get_cntvct(void) 69 { 70 isb(); 71 return read_sysreg(CNTVCT); 72 } 73 74 static inline u32 get_cntfrq(void) 75 { 76 return read_sysreg(CNTFRQ); 77 } 78 79 #endif /* _ASMARM_PROCESSOR_H_ */ 80