1 #ifndef _ASMARM_PROCESSOR_H_ 2 #define _ASMARM_PROCESSOR_H_ 3 /* 4 * Copyright (C) 2014, Red Hat Inc, Andrew Jones <drjones@redhat.com> 5 * 6 * This work is licensed under the terms of the GNU LGPL, version 2. 7 */ 8 #include <asm/ptrace.h> 9 #include <asm/sysreg.h> 10 #include <asm/barrier.h> 11 12 #define CTR_DMINLINE_SHIFT 16 13 #define CTR_DMINLINE_MASK (0xf << 16) 14 #define CTR_DMINLINE(x) \ 15 (((x) & CTR_DMINLINE_MASK) >> CTR_DMINLINE_SHIFT) 16 17 enum vector { 18 EXCPTN_RST, 19 EXCPTN_UND, 20 EXCPTN_SVC, 21 EXCPTN_PABT, 22 EXCPTN_DABT, 23 EXCPTN_ADDREXCPTN, 24 EXCPTN_IRQ, 25 EXCPTN_FIQ, 26 EXCPTN_MAX, 27 }; 28 29 typedef void (*irq_handler_fn)(struct pt_regs *regs); 30 typedef void (*exception_fn)(struct pt_regs *); 31 32 extern void install_exception_handler(enum vector v, exception_fn fn); 33 34 extern void show_regs(struct pt_regs *regs); 35 36 static inline unsigned long current_cpsr(void) 37 { 38 unsigned long cpsr; 39 asm volatile("mrs %0, cpsr" : "=r" (cpsr)); 40 return cpsr; 41 } 42 43 #define current_mode() (current_cpsr() & MODE_MASK) 44 45 static inline void local_irq_enable(void) 46 { 47 asm volatile("cpsie i" : : : "memory", "cc"); 48 } 49 50 static inline void local_irq_disable(void) 51 { 52 asm volatile("cpsid i" : : : "memory", "cc"); 53 } 54 55 #define MPIDR __ACCESS_CP15(c0, 0, c0, 5) 56 static inline uint64_t get_mpidr(void) 57 { 58 return read_sysreg(MPIDR); 59 } 60 61 #define MPIDR_HWID_BITMASK 0xffffff 62 extern int mpidr_to_cpu(uint64_t mpidr); 63 64 #define MPIDR_LEVEL_SHIFT(level) \ 65 (((1 << level) >> 1) << 3) 66 #define MPIDR_AFFINITY_LEVEL(mpidr, level) \ 67 ((mpidr >> MPIDR_LEVEL_SHIFT(level)) & 0xff) 68 69 extern void start_usr(void (*func)(void *arg), void *arg, unsigned long sp_usr); 70 extern bool is_user(void); 71 72 #define CNTVCT __ACCESS_CP15_64(1, c14) 73 #define CNTFRQ __ACCESS_CP15(c14, 0, c0, 0) 74 #define CTR __ACCESS_CP15(c0, 0, c0, 1) 75 76 static inline u64 get_cntvct(void) 77 { 78 isb(); 79 return read_sysreg(CNTVCT); 80 } 81 82 static inline u32 get_cntfrq(void) 83 { 84 return read_sysreg(CNTFRQ); 85 } 86 87 static inline u32 get_ctr(void) 88 { 89 return read_sysreg(CTR); 90 } 91 92 extern u32 dcache_line_size; 93 94 #endif /* _ASMARM_PROCESSOR_H_ */ 95