xref: /kvm-unit-tests/arm/micro-bench.c (revision 2ca3364b26dc95711b81807189b88a33a1dd6eed)
1 /*
2  * Measure the cost of micro level operations.
3  *
4  * This test provides support for quantifying the cost of micro level
5  * operations. To improve precision in the measurements, one should
6  * consider pinning each VCPU to a specific physical CPU (PCPU) and to
7  * ensure no other task could run on that PCPU to skew the results.
8  * This can be achieved by enabling QMP server in the QEMU command in
9  * unittest.cfg for micro-bench, allowing a client program to get the
10  * thread_id for each VCPU thread from the QMP server. Based on that
11  * information, the client program can then pin the corresponding VCPUs to
12  * dedicated PCPUs and isolate interrupts and tasks from those PCPUs.
13  *
14  * Copyright Columbia University
15  * Author: Shih-Wei Li <shihwei@cs.columbia.edu>
16  * Author: Christoffer Dall <cdall@cs.columbia.edu>
17  * Author: Andrew Jones <drjones@redhat.com>
18  *
19  * This work is licensed under the terms of the GNU LGPL, version 2.
20  */
21 #include <libcflat.h>
22 #include <asm/gic.h>
23 
24 #define NTIMES (1U << 16)
25 
26 static u32 cntfrq;
27 
28 static volatile bool ipi_ready, ipi_received;
29 static void *vgic_dist_base;
30 static void (*write_eoir)(u32 irqstat);
31 
32 static void ipi_irq_handler(struct pt_regs *regs)
33 {
34 	ipi_ready = false;
35 	ipi_received = true;
36 	gic_write_eoir(gic_read_iar());
37 	ipi_ready = true;
38 }
39 
40 static void ipi_secondary_entry(void *data)
41 {
42 	install_irq_handler(EL1H_IRQ, ipi_irq_handler);
43 	gic_enable_defaults();
44 	local_irq_enable();
45 	ipi_ready = true;
46 	while (true)
47 		cpu_relax();
48 }
49 
50 static bool test_init(void)
51 {
52 	int v = gic_init();
53 
54 	if (!v) {
55 		printf("No supported gic present, skipping tests...\n");
56 		return false;
57 	}
58 
59 	if (nr_cpus < 2) {
60 		printf("At least two cpus required, skipping tests...\n");
61 		return false;
62 	}
63 
64 	switch (v) {
65 	case 2:
66 		vgic_dist_base = gicv2_dist_base();
67 		write_eoir = gicv2_write_eoir;
68 		break;
69 	case 3:
70 		vgic_dist_base = gicv3_dist_base();
71 		write_eoir = gicv3_write_eoir;
72 		break;
73 	}
74 
75 	ipi_ready = false;
76 	gic_enable_defaults();
77 	on_cpu_async(1, ipi_secondary_entry, NULL);
78 
79 	cntfrq = get_cntfrq();
80 	printf("Timer Frequency %d Hz (Output in microseconds)\n", cntfrq);
81 
82 	return true;
83 }
84 
85 static void ipi_prep(void)
86 {
87 	unsigned tries = 1 << 28;
88 
89 	while (!ipi_ready && tries--)
90 		cpu_relax();
91 	assert(ipi_ready);
92 }
93 
94 static void ipi_exec(void)
95 {
96 	unsigned tries = 1 << 28;
97 	static int received = 0;
98 
99 	ipi_received = false;
100 
101 	gic_ipi_send_single(1, 1);
102 
103 	while (!ipi_received && tries--)
104 		cpu_relax();
105 
106 	if (ipi_received)
107 		++received;
108 
109 	assert_msg(ipi_received, "failed to receive IPI in time, but received %d successfully\n", received);
110 }
111 
112 static void hvc_exec(void)
113 {
114 	asm volatile("mov w0, #0x4b000000; hvc #0" ::: "w0");
115 }
116 
117 static void mmio_read_user_exec(void)
118 {
119 	/*
120 	 * FIXME: Read device-id in virtio mmio here in order to
121 	 * force an exit to userspace. This address needs to be
122 	 * updated in the future if any relevant changes in QEMU
123 	 * test-dev are made.
124 	 */
125 	void *userspace_emulated_addr = (void*)0x0a000008;
126 
127 	readl(userspace_emulated_addr);
128 }
129 
130 static void mmio_read_vgic_exec(void)
131 {
132 	readl(vgic_dist_base + GICD_IIDR);
133 }
134 
135 static void eoi_exec(void)
136 {
137 	int spurious_id = 1023; /* writes to EOI are ignored */
138 
139 	/* Avoid measuring assert(..) in gic_write_eoir */
140 	write_eoir(spurious_id);
141 }
142 
143 struct exit_test {
144 	const char *name;
145 	void (*prep)(void);
146 	void (*exec)(void);
147 	bool run;
148 };
149 
150 static struct exit_test tests[] = {
151 	{"hvc",			NULL,		hvc_exec,		true},
152 	{"mmio_read_user",	NULL,		mmio_read_user_exec,	true},
153 	{"mmio_read_vgic",	NULL,		mmio_read_vgic_exec,	true},
154 	{"eoi",			NULL,		eoi_exec,		true},
155 	{"ipi",			ipi_prep,	ipi_exec,		true},
156 };
157 
158 struct ns_time {
159 	uint64_t ns;
160 	uint64_t ns_frac;
161 };
162 
163 #define PS_PER_SEC (1000 * 1000 * 1000 * 1000UL)
164 static void ticks_to_ns_time(uint64_t ticks, struct ns_time *ns_time)
165 {
166 	uint64_t ps_per_tick = PS_PER_SEC / cntfrq + !!(PS_PER_SEC % cntfrq);
167 	uint64_t ps;
168 
169 	ps = ticks * ps_per_tick;
170 	ns_time->ns = ps / 1000;
171 	ns_time->ns_frac = (ps % 1000) / 100;
172 }
173 
174 static void loop_test(struct exit_test *test)
175 {
176 	uint64_t start, end, total_ticks, ntimes = NTIMES;
177 	struct ns_time total_ns, avg_ns;
178 
179 	if (test->prep)
180 		test->prep();
181 
182 	isb();
183 	start = read_sysreg(cntpct_el0);
184 	while (ntimes--)
185 		test->exec();
186 	isb();
187 	end = read_sysreg(cntpct_el0);
188 
189 	total_ticks = end - start;
190 	ticks_to_ns_time(total_ticks, &total_ns);
191 	avg_ns.ns = total_ns.ns / NTIMES;
192 	avg_ns.ns_frac = total_ns.ns_frac / NTIMES;
193 
194 	printf("%-30s%15" PRId64 ".%-15" PRId64 "%15" PRId64 ".%-15" PRId64 "\n",
195 		test->name, total_ns.ns, total_ns.ns_frac, avg_ns.ns, avg_ns.ns_frac);
196 }
197 
198 int main(int argc, char **argv)
199 {
200 	int i;
201 
202 	if (!test_init())
203 		return 1;
204 
205 	printf("\n%-30s%18s%13s%18s%13s\n", "name", "total ns", "", "avg ns", "");
206 	for (i = 0 ; i < 92; ++i)
207 		printf("%c", '-');
208 	printf("\n");
209 	for (i = 0; i < ARRAY_SIZE(tests); i++) {
210 		if (!tests[i].run)
211 			continue;
212 		assert(tests[i].name && tests[i].exec);
213 		loop_test(&tests[i]);
214 	}
215 
216 	return 0;
217 }
218