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Searched refs:pipe (Results 1 – 25 of 1109) sorted by relevance

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/linux/drivers/usb/renesas_usbhs/
H A Dpipe.c33 char *usbhs_pipe_name(struct usbhs_pipe *pipe) in usbhs_pipe_name() argument
35 return usbhsp_pipe_name[usbhs_pipe_type(pipe)]; in usbhs_pipe_name()
50 static void usbhsp_pipectrl_set(struct usbhs_pipe *pipe, u16 mask, u16 val) in usbhsp_pipectrl_set() argument
52 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); in usbhsp_pipectrl_set()
53 int offset = usbhsp_addr_offset(pipe); in usbhsp_pipectrl_set()
55 if (usbhs_pipe_is_dcp(pipe)) in usbhsp_pipectrl_set()
61 static u16 usbhsp_pipectrl_get(struct usbhs_pipe *pipe) in usbhsp_pipectrl_get() argument
63 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); in usbhsp_pipectrl_get()
64 int offset = usbhsp_addr_offset(pipe); in usbhsp_pipectrl_get()
66 if (usbhs_pipe_is_dcp(pipe)) in usbhsp_pipectrl_get()
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H A Dfifo.c17 #define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */
32 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); in usbhsf_null_handle()
45 void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, in usbhs_pkt_push() argument
50 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); in usbhs_pkt_push()
62 if (!pipe->handler) { in usbhs_pkt_push()
64 pipe->handler = &usbhsf_null_handler; in usbhs_pkt_push()
67 list_move_tail(&pkt->node, &pipe->list); in usbhs_pkt_push()
74 pkt->pipe = pipe; in usbhs_pkt_push()
76 pkt->handler = pipe->handler; in usbhs_pkt_push()
92 struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe) in __usbhsf_pkt_get() argument
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/linux/drivers/gpu/drm/
H A Ddrm_simple_kms_helper.c90 struct drm_simple_display_pipe *pipe; in drm_simple_kms_crtc_mode_valid() local
92 pipe = container_of(crtc, struct drm_simple_display_pipe, crtc); in drm_simple_kms_crtc_mode_valid()
93 if (!pipe->funcs || !pipe->funcs->mode_valid) in drm_simple_kms_crtc_mode_valid()
97 return pipe->funcs->mode_valid(pipe, mode); in drm_simple_kms_crtc_mode_valid()
121 struct drm_simple_display_pipe *pipe; in drm_simple_kms_crtc_enable() local
123 pipe = container_of(crtc, struct drm_simple_display_pipe, crtc); in drm_simple_kms_crtc_enable()
124 if (!pipe->funcs || !pipe->funcs->enable) in drm_simple_kms_crtc_enable()
127 plane = &pipe->plane; in drm_simple_kms_crtc_enable()
128 pipe->funcs->enable(pipe, crtc->state, plane->state); in drm_simple_kms_crtc_enable()
134 struct drm_simple_display_pipe *pipe; in drm_simple_kms_crtc_disable() local
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/linux/drivers/gpu/drm/i915/display/
H A Dintel_color_regs.h33 #define PALETTE(dev_priv, pipe, i) _MMIO(DISPLAY_MMIO_BASE(dev_priv) + \ argument
34 _PICK_EVEN_2RANGES(pipe, 2, \
42 #define PIPEGCMAX(dev_priv, pipe, i) _MMIO_PIPE2(dev_priv, pipe, _PIPEAGCMAX + (i) * 4) /* u1.16 */ argument
48 #define LGC_PALETTE(pipe, i) _MMIO(_PIPE(pipe, _LGC_PALETTE_A, _LGC_PALETTE_B) + (i) * 4) argument
65 #define PREC_PALETTE(pipe, i) _MMIO(_PIPE(pipe, _PREC_PALETTE_A, _PREC_PALETTE_B) + (i) * 4) argument
69 #define PREC_PIPEGCMAX(pipe, i) _MMIO(_PIPE(pipe, _PIPEAGCMAX, _PIPEBGCMAX) + (i) * 4) /* u1… argument
73 #define GAMMA_MODE(pipe) _MMIO_PIPE(pipe, _GAMMA_MODE_A, _GAMMA_MODE_B) argument
120 #define PIPE_CSC_COEFF_RY_GY(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_COEFF_RY_GY, _PIPE_B_CSC_COEFF_RY_G… argument
121 #define PIPE_CSC_COEFF_BY(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_COEFF_BY, _PIPE_B_CSC_COEFF_BY) argument
122 #define PIPE_CSC_COEFF_RU_GU(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_COEFF_RU_GU, _PIPE_B_CSC_COEFF_RU_G… argument
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H A Dskl_universal_plane_regs.h11 #define _SKL_PLANE(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
12 _PLANE((plane), _PIPE((pipe), (reg_1_a), (reg_1_b)), _PIPE((pipe), (reg_2_a), (reg_2_b)))
13 #define _SKL_PLANE_DW(pipe, plane, dw, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
14 (_SKL_PLANE((pipe), (plane), (reg_1_a), (reg_1_b), (reg_2_a), (reg_2_b)) + (dw) * 4)
15 #define _MMIO_SKL_PLANE(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
16 _MMIO(_SKL_PLANE((pipe), (plane), (reg_1_a), (reg_1_b), (reg_2_a), (reg_2_b)))
17 #define _MMIO_SKL_PLANE_DW(pipe, plane, dw, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
18 _MMIO(_SKL_PLANE_DW((pipe), (plane), (dw), (reg_1_a), (reg_1_b), (reg_2_a), (reg_2_b)))
20 #define _SEL_FETCH(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b, reg_5_a, reg_5_b, reg_6_a, reg_… argument
22 _PIPE((pipe), (reg_1_a), (reg_1_b)), \
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H A Dintel_vdsc_regs.h33 #define ICL_PIPE_DSS_CTL1(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ argument
49 #define ICL_PIPE_DSS_CTL2(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ argument
66 #define ICL_DSC0_PICTURE_PARAMETER_SET_0(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ argument
69 #define ICL_DSC1_PICTURE_PARAMETER_SET_0(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ argument
72 #define _ICL_DSC0_PPS_0(pipe) _PICK_EVEN((pipe) - PIPE_B, \ argument
75 #define _ICL_DSC1_PPS_0(pipe) _PICK_EVEN((pipe) - PIPE_B, \ argument
78 #define _BMG_DSC2_PPS_0(pipe) _PICK_EVEN((pipe) - PIPE_B, \ argument
81 #define ICL_DSC0_PPS(pipe, pps) _MMIO(_ICL_DSC0_PPS_0(pipe) + ((pps) * 4)) argument
82 #define ICL_DSC1_PPS(pipe, pps) _MMIO(_ICL_DSC1_PPS_0(pipe) + ((pps) * 4)) argument
83 #define BMG_DSC2_PPS(pipe, pps) _MMIO(_BMG_DSC2_PPS_0(pipe) + ((pps) * 4)) argument
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H A Dintel_pch_display.c26 enum pipe pch_transcoder) in intel_has_pch_trancoder()
32 enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc) in intel_crtc_pch_transcoder()
39 return crtc->pipe; in intel_crtc_pch_transcoder()
43 enum pipe pipe, enum port port, in assert_pch_dp_disabled() argument
46 enum pipe port_pipe; in assert_pch_dp_disabled()
51 INTEL_DISPLAY_STATE_WARN(display, state && port_pipe == pipe, in assert_pch_dp_disabled()
53 port_name(port), pipe_name(pipe)); in assert_pch_dp_disabled()
62 enum pipe pipe, enum port port, in assert_pch_hdmi_disabled() argument
65 enum pipe port_pipe; in assert_pch_hdmi_disabled()
70 INTEL_DISPLAY_STATE_WARN(display, state && port_pipe == pipe, in assert_pch_hdmi_disabled()
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H A Dintel_sprite_regs.h12 #define DVSCNTR(pipe) _MMIO_PIPE(pipe, _DVSACNTR, _DVSBCNTR) argument
37 #define DVSLINOFF(pipe) _MMIO_PIPE(pipe, _DVSALINOFF, _DVSBLINOFF) argument
41 #define DVSSTRIDE(pipe) _MMIO_PIPE(pipe, _DVSASTRIDE, _DVSBSTRIDE) argument
45 #define DVSPOS(pipe) _MMIO_PIPE(pipe, _DVSAPOS, _DVSBPOS) argument
53 #define DVSSIZE(pipe) _MMIO_PIPE(pipe, _DVSASIZE, _DVSBSIZE) argument
61 #define DVSKEYVAL(pipe) _MMIO_PIPE(pipe, _DVSAKEYVAL, _DVSBKEYVAL) argument
65 #define DVSKEYMSK(pipe) _MMIO_PIPE(pipe, _DVSAKEYMSK, _DVSBKEYMSK) argument
69 #define DVSSURF(pipe) _MMIO_PIPE(pipe, _DVSASURF, _DVSBSURF) argument
74 #define DVSKEYMAX(pipe) _MMIO_PIPE(pipe, _DVSAKEYMAXVAL, _DVSBKEYMAXVAL) argument
78 #define DVSTILEOFF(pipe) _MMIO_PIPE(pipe, _DVSATILEOFF, _DVSBTILEOFF) argument
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H A Dintel_pipe_crc_regs.h12 #define PIPE_CRC_CTL(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_CTL_A) argument
63 #define PIPE_CRC_EXP_GREEN(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_EXP_GREEN_A) argument
67 #define PIPE_CRC_EXP_BLUE(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_EXP_BLUE_A) argument
71 #define PIPE_CRC_EXP_RES1_I915(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_EXP_RES1_A_I9… argument
75 #define PIPE_CRC_EXP_RES2_G4X(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_EXP_RES2_A_G4X) argument
79 #define PIPE_CRC_RES_RED(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_RES_RED_A) argument
82 #define PIPE_CRC_RES_GREEN(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_RES_GREEN_A) argument
85 #define PIPE_CRC_RES_BLUE(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_RES_BLUE_A) argument
88 #define PIPE_CRC_RES_RES1_I915(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_RES_RES1_… argument
91 #define PIPE_CRC_RES_RES2_G4X(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_RES_RES2_A… argument
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H A Dintel_dsb_regs.h13 #define DSBSL_INSTANCE(pipe, id) (_DSBSL_INSTANCE_BASE + \ argument
14 (pipe) * 0x1000 + (id) * 0x100)
15 #define DSB_HEAD(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x0) argument
16 #define DSB_TAIL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x4) argument
17 #define DSB_CTRL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x8) argument
25 #define DSB_MMIOCTRL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0xc) argument
31 #define DSB_POLLFUNC(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x10) argument
37 #define DSB_DEBUG(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x14) argument
38 #define DSB_POLLMASK(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x1c) argument
39 #define DSB_STATUS(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x24) argument
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/linux/drivers/media/platform/nxp/imx8-isi/
H A Dimx8-isi-hw.c16 static inline u32 mxc_isi_read(struct mxc_isi_pipe *pipe, u32 reg) in mxc_isi_read() argument
18 return readl(pipe->regs + reg); in mxc_isi_read()
21 static inline void mxc_isi_write(struct mxc_isi_pipe *pipe, u32 reg, u32 val) in mxc_isi_write() argument
23 writel(val, pipe->regs + reg); in mxc_isi_write()
30 void mxc_isi_channel_set_inbuf(struct mxc_isi_pipe *pipe, dma_addr_t dma_addr) in mxc_isi_channel_set_inbuf() argument
32 mxc_isi_write(pipe, CHNL_IN_BUF_ADDR, lower_32_bits(dma_addr)); in mxc_isi_channel_set_inbuf()
33 if (pipe->isi->pdata->has_36bit_dma) in mxc_isi_channel_set_inbuf()
34 mxc_isi_write(pipe, CHNL_IN_BUF_XTND_ADDR, in mxc_isi_channel_set_inbuf()
38 void mxc_isi_channel_set_outbuf(struct mxc_isi_pipe *pipe, in mxc_isi_channel_set_outbuf() argument
44 val = mxc_isi_read(pipe, CHNL_OUT_BUF_CTRL); in mxc_isi_channel_set_outbuf()
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/linux/fs/
H A Dpipe.c88 void pipe_lock(struct pipe_inode_info *pipe) in pipe_lock() argument
90 if (pipe->files) in pipe_lock()
91 mutex_lock(&pipe->mutex); in pipe_lock()
95 void pipe_unlock(struct pipe_inode_info *pipe) in pipe_unlock() argument
97 if (pipe->files) in pipe_unlock()
98 mutex_unlock(&pipe->mutex); in pipe_unlock()
114 static struct page *anon_pipe_get_page(struct pipe_inode_info *pipe) in anon_pipe_get_page() argument
116 for (int i = 0; i < ARRAY_SIZE(pipe->tmp_page); i++) { in anon_pipe_get_page()
117 if (pipe->tmp_page[i]) { in anon_pipe_get_page()
118 struct page *page = pipe->tmp_page[i]; in anon_pipe_get_page()
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/linux/sound/drivers/vx/
H A Dvx_pcm.c46 struct vx_pipe *pipe) in vx_pcm_read_per_bytes() argument
48 int offset = pipe->hw_ptr; in vx_pcm_read_per_bytes()
51 if (++offset >= pipe->buffer_bytes) { in vx_pcm_read_per_bytes()
56 if (++offset >= pipe->buffer_bytes) { in vx_pcm_read_per_bytes()
61 if (++offset >= pipe->buffer_bytes) { in vx_pcm_read_per_bytes()
64 pipe->hw_ptr = offset; in vx_pcm_read_per_bytes()
90 struct vx_pipe *pipe) in vx_set_differed_time() argument
93 if (! (pipe->differed_type & DC_DIFFERED_DELAY)) in vx_set_differed_time()
100 vx_set_pcx_time(chip, &pipe->pcx_time, &rmh->Cmd[1]); in vx_set_differed_time()
103 if (pipe->differed_type & DC_NOTIFY_DELAY) in vx_set_differed_time()
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/linux/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_pipeline.c21 struct komeda_pipeline *pipe; in komeda_pipeline_add() local
29 if (size < sizeof(*pipe)) { in komeda_pipeline_add()
34 pipe = devm_kzalloc(mdev->dev, size, GFP_KERNEL); in komeda_pipeline_add()
35 if (!pipe) in komeda_pipeline_add()
38 pipe->mdev = mdev; in komeda_pipeline_add()
39 pipe->id = mdev->n_pipelines; in komeda_pipeline_add()
40 pipe->funcs = funcs; in komeda_pipeline_add()
42 mdev->pipelines[mdev->n_pipelines] = pipe; in komeda_pipeline_add()
45 return pipe; in komeda_pipeline_add()
49 struct komeda_pipeline *pipe) in komeda_pipeline_destroy() argument
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/linux/drivers/media/platform/renesas/vsp1/
H A Dvsp1_drm.c34 static void vsp1_du_pipeline_frame_end(struct vsp1_pipeline *pipe, in vsp1_du_pipeline_frame_end() argument
37 struct vsp1_drm_pipeline *drm_pipe = to_vsp1_drm_pipeline(pipe); in vsp1_du_pipeline_frame_end()
65 struct vsp1_pipeline *pipe, in vsp1_du_insert_uif() argument
117 struct vsp1_pipeline *pipe, in vsp1_du_pipeline_setup_rpf() argument
191 ret = vsp1_du_insert_uif(vsp1, pipe, uif, &rpf->entity, RWPF_PAD_SOURCE, in vsp1_du_pipeline_setup_rpf()
192 pipe->brx, brx_input); in vsp1_du_pipeline_setup_rpf()
199 ret = v4l2_subdev_call(&pipe->brx->subdev, pad, set_fmt, NULL, in vsp1_du_pipeline_setup_rpf()
206 format.format.code, BRX_NAME(pipe->brx), format.pad); in vsp1_du_pipeline_setup_rpf()
212 ret = v4l2_subdev_call(&pipe->brx->subdev, pad, set_selection, NULL, in vsp1_du_pipeline_setup_rpf()
219 BRX_NAME(pipe->brx), sel.pad); in vsp1_du_pipeline_setup_rpf()
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H A Dvsp1_vspx.c41 struct vsp1_pipeline pipe; member
69 to_vsp1_vspx_pipeline(struct vsp1_pipeline *pipe) in to_vsp1_vspx_pipeline() argument
71 return container_of(pipe, struct vsp1_vspx_pipeline, pipe); in to_vsp1_vspx_pipeline()
81 struct vsp1_vspx_pipeline pipe; member
135 struct vsp1_vspx_pipeline *vspx_pipe = &vsp1->vspx->pipe; in vsp1_vspx_pipeline_configure()
136 struct vsp1_pipeline *pipe = &vspx_pipe->pipe; in vsp1_vspx_pipeline_configure() local
137 struct vsp1_rwpf *rpf0 = pipe->inputs[0]; in vsp1_vspx_pipeline_configure()
145 ret = vsp1_vspx_rwpf_set_subdev_fmt(vsp1, pipe->output, isp_fourcc, in vsp1_vspx_pipeline_configure()
150 vsp1_pipeline_calculate_partition(pipe, &pipe->part_table[0], width, 0); in vsp1_vspx_pipeline_configure()
161 vsp1_entity_route_setup(&rpf0->entity, pipe, dlb); in vsp1_vspx_pipeline_configure()
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H A Dvsp1_video.c209 struct vsp1_pipeline *pipe = video->rwpf->entity.pipe; in vsp1_video_complete_buffer() local
233 done->buf.sequence = pipe->sequence; in vsp1_video_complete_buffer()
243 static void vsp1_video_frame_end(struct vsp1_pipeline *pipe, in vsp1_video_frame_end() argument
254 pipe->buffers_ready |= 1 << video->pipe_index; in vsp1_video_frame_end()
257 static void vsp1_video_pipeline_run_partition(struct vsp1_pipeline *pipe, in vsp1_video_pipeline_run_partition() argument
261 struct vsp1_partition *part = &pipe->part_table[partition]; in vsp1_video_pipeline_run_partition()
265 list_for_each_entry(entity, &pipe->entities, list_pipe) in vsp1_video_pipeline_run_partition()
266 vsp1_entity_configure_partition(entity, pipe, part, dl, dlb); in vsp1_video_pipeline_run_partition()
269 static void vsp1_video_pipeline_run(struct vsp1_pipeline *pipe) in vsp1_video_pipeline_run() argument
271 struct vsp1_device *vsp1 = pipe->output->entity.vsp1; in vsp1_video_pipeline_run()
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H A Dvsp1_pipe.c407 void vsp1_pipeline_reset(struct vsp1_pipeline *pipe) in vsp1_pipeline_reset() argument
412 if (pipe->brx) { in vsp1_pipeline_reset()
413 struct vsp1_brx *brx = to_brx(&pipe->brx->subdev); in vsp1_pipeline_reset()
419 for (i = 0; i < ARRAY_SIZE(pipe->inputs); ++i) in vsp1_pipeline_reset()
420 pipe->inputs[i] = NULL; in vsp1_pipeline_reset()
422 pipe->output = NULL; in vsp1_pipeline_reset()
424 list_for_each_entry(entity, &pipe->entities, list_pipe) in vsp1_pipeline_reset()
425 entity->pipe = NULL; in vsp1_pipeline_reset()
427 INIT_LIST_HEAD(&pipe->entities); in vsp1_pipeline_reset()
428 pipe->state = VSP1_PIPELINE_STOPPED; in vsp1_pipeline_reset()
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/linux/drivers/net/wwan/iosm/
H A Diosm_ipc_protocol_ops.c59 struct ipc_pipe *pipe = args->pipe_open.pipe; in ipc_protocol_msg_prepipe_open() local
72 skbr = kzalloc_objs(*skbr, pipe->nr_of_entries, GFP_ATOMIC); in ipc_protocol_msg_prepipe_open()
78 pipe->nr_of_entries * sizeof(*tdr), in ipc_protocol_msg_prepipe_open()
79 &pipe->phy_tdr_start, GFP_ATOMIC); in ipc_protocol_msg_prepipe_open()
86 pipe->max_nr_of_queued_entries = pipe->nr_of_entries - 1; in ipc_protocol_msg_prepipe_open()
87 pipe->nr_of_queued_entries = 0; in ipc_protocol_msg_prepipe_open()
88 pipe->tdr_start = tdr; in ipc_protocol_msg_prepipe_open()
89 pipe->skbr_start = skbr; in ipc_protocol_msg_prepipe_open()
90 pipe->old_tail = 0; in ipc_protocol_msg_prepipe_open()
92 ipc_protocol->p_ap_shm->head_array[pipe->pipe_nr] = 0; in ipc_protocol_msg_prepipe_open()
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/linux/drivers/staging/media/atomisp/pci/camera/pipe/src/
H A Dpipe_binarydesc.c28 struct ia_css_pipe const *const pipe, in pipe_binarydesc_get_offline() argument
37 assert(pipe); in pipe_binarydesc_get_offline()
44 descr->continuous = pipe->stream->config.continuous; in pipe_binarydesc_get_offline()
59 descr->stream_format = pipe->stream->config.input_config.format; in pipe_binarydesc_get_offline()
65 descr->isp_pipe_version = pipe->config.isp_pipe_version; in pipe_binarydesc_get_offline()
71 struct ia_css_pipe const *const pipe, in ia_css_pipe_get_copy_binarydesc() argument
80 assert(pipe); in ia_css_pipe_get_copy_binarydesc()
88 pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_COPY, in ia_css_pipe_get_copy_binarydesc()
92 copy_descr->two_ppc = (pipe->stream->config.pixels_per_clock == 2); in ia_css_pipe_get_copy_binarydesc()
99 struct ia_css_pipe const *const pipe, in ia_css_pipe_get_vfpp_binarydesc() argument
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/linux/drivers/net/wireless/ath/ath12k/
H A Dce.c11 static int ath12k_ce_rx_buf_enqueue_pipe(struct ath12k_ce_pipe *pipe, in ath12k_ce_rx_buf_enqueue_pipe() argument
14 struct ath12k_base *ab = pipe->ab; in ath12k_ce_rx_buf_enqueue_pipe()
15 struct ath12k_ce_ring *ring = pipe->dest_ring; in ath12k_ce_rx_buf_enqueue_pipe()
49 pipe->rx_buf_needed--; in ath12k_ce_rx_buf_enqueue_pipe()
60 static int ath12k_ce_rx_post_pipe(struct ath12k_ce_pipe *pipe) in ath12k_ce_rx_post_pipe() argument
62 struct ath12k_base *ab = pipe->ab; in ath12k_ce_rx_post_pipe()
67 if (!(pipe->dest_ring || pipe->status_ring)) in ath12k_ce_rx_post_pipe()
71 while (pipe->rx_buf_needed) { in ath12k_ce_rx_post_pipe()
72 skb = dev_alloc_skb(pipe->buf_sz); in ath12k_ce_rx_post_pipe()
92 ret = ath12k_ce_rx_buf_enqueue_pipe(pipe, skb, paddr); in ath12k_ce_rx_post_pipe()
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/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource_helpers.c114 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_merge_pipes_for_subvp() local
119 if (pipe->prev_odm_pipe) { in dcn32_merge_pipes_for_subvp()
121 pipe->prev_odm_pipe->next_odm_pipe = pipe->next_odm_pipe; in dcn32_merge_pipes_for_subvp()
122 if (pipe->next_odm_pipe) in dcn32_merge_pipes_for_subvp()
123 pipe->next_odm_pipe->prev_odm_pipe = pipe->prev_odm_pipe; in dcn32_merge_pipes_for_subvp()
125 pipe->bottom_pipe = NULL; in dcn32_merge_pipes_for_subvp()
126 pipe->next_odm_pipe = NULL; in dcn32_merge_pipes_for_subvp()
127 pipe->plane_state = NULL; in dcn32_merge_pipes_for_subvp()
128 pipe->stream = NULL; in dcn32_merge_pipes_for_subvp()
129 pipe->top_pipe = NULL; in dcn32_merge_pipes_for_subvp()
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/linux/drivers/staging/media/atomisp/pci/
H A Dsh_css.c173 allocate_delay_frames(struct ia_css_pipe *pipe);
192 ia_css_pipe_check_format(struct ia_css_pipe *pipe,
206 need_capture_pp(const struct ia_css_pipe *pipe);
209 need_yuv_scaler_stage(const struct ia_css_pipe *pipe);
224 static bool need_capt_ldc(const struct ia_css_pipe *pipe);
227 sh_css_pipe_load_binaries(struct ia_css_pipe *pipe);
231 struct ia_css_pipe *pipe,
236 sh_css_pipe_get_output_frame_info(struct ia_css_pipe *pipe,
241 capture_start(struct ia_css_pipe *pipe);
244 video_start(struct ia_css_pipe *pipe);
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/linux/drivers/gpu/drm/lima/
H A Dlima_sched.c24 struct lima_sched_pipe *pipe; member
66 return f->pipe->base.name; in lima_fence_get_timeline_name()
90 static struct lima_fence *lima_fence_create(struct lima_sched_pipe *pipe) in lima_fence_create() argument
98 fence->pipe = pipe; in lima_fence_create()
99 dma_fence_init(&fence->base, &lima_fence_ops, &pipe->fence_lock, in lima_fence_create()
100 pipe->fence_context, ++pipe->fence_seqno); in lima_fence_create()
160 int lima_sched_context_init(struct lima_sched_pipe *pipe, in lima_sched_context_init() argument
163 struct drm_gpu_scheduler *sched = &pipe->base; in lima_sched_context_init()
169 void lima_sched_context_fini(struct lima_sched_pipe *pipe, in lima_sched_context_fini() argument
209 struct lima_sched_pipe *pipe = to_lima_pipe(job->sched); in lima_sched_run_job() local
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/linux/drivers/platform/goldfish/
H A Dgoldfish_pipe.c217 static int goldfish_pipe_cmd_locked(struct goldfish_pipe *pipe, in goldfish_pipe_cmd_locked() argument
220 pipe->command_buffer->cmd = cmd; in goldfish_pipe_cmd_locked()
222 pipe->command_buffer->status = PIPE_ERROR_INVAL; in goldfish_pipe_cmd_locked()
223 writel(pipe->id, pipe->dev->base + PIPE_REG_CMD); in goldfish_pipe_cmd_locked()
224 return pipe->command_buffer->status; in goldfish_pipe_cmd_locked()
227 static int goldfish_pipe_cmd(struct goldfish_pipe *pipe, enum PipeCmdCode cmd) in goldfish_pipe_cmd() argument
231 if (mutex_lock_interruptible(&pipe->lock)) in goldfish_pipe_cmd()
233 status = goldfish_pipe_cmd_locked(pipe, cmd); in goldfish_pipe_cmd()
234 mutex_unlock(&pipe->lock); in goldfish_pipe_cmd()
324 static int transfer_max_buffers(struct goldfish_pipe *pipe, in transfer_max_buffers() argument
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