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Searched refs:dcdc (Results 1 – 25 of 70) sorted by relevance

123

/linux/drivers/regulator/
H A Dwm831x-dcdc.c62 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); in wm831x_dcdc_get_mode() local
63 struct wm831x *wm831x = dcdc->wm831x; in wm831x_dcdc_get_mode()
64 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; in wm831x_dcdc_get_mode()
116 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); in wm831x_dcdc_set_mode() local
117 struct wm831x *wm831x = dcdc->wm831x; in wm831x_dcdc_set_mode()
118 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; in wm831x_dcdc_set_mode()
126 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); in wm831x_dcdc_set_suspend_mode() local
127 struct wm831x *wm831x = dcdc->wm831x; in wm831x_dcdc_set_suspend_mode()
128 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; in wm831x_dcdc_set_suspend_mode()
135 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); in wm831x_dcdc_get_status() local
[all …]
H A Dwm8350-regulator.c266 int sel, volt_reg, dcdc = rdev_get_id(rdev); in wm8350_dcdc_set_suspend_voltage() local
269 dev_dbg(wm8350->dev, "%s %d mV %d\n", __func__, dcdc, uV / 1000); in wm8350_dcdc_set_suspend_voltage()
271 switch (dcdc) { in wm8350_dcdc_set_suspend_voltage()
303 int dcdc = rdev_get_id(rdev); in wm8350_dcdc_set_suspend_enable() local
306 switch (dcdc) { in wm8350_dcdc_set_suspend_enable()
343 int dcdc = rdev_get_id(rdev); in wm8350_dcdc_set_suspend_disable() local
346 switch (dcdc) { in wm8350_dcdc_set_suspend_disable()
383 int dcdc = rdev_get_id(rdev); in wm8350_dcdc25_set_suspend_enable() local
386 switch (dcdc) { in wm8350_dcdc25_set_suspend_enable()
408 int dcdc = rdev_get_id(rdev); in wm8350_dcdc25_set_suspend_disable() local
[all …]
H A Dtps65023-regulator.c171 int dcdc = rdev_get_id(dev); in tps65023_dcdc_get_voltage_sel() local
173 if (dcdc < TPS65023_DCDC_1 || dcdc > TPS65023_DCDC_3) in tps65023_dcdc_get_voltage_sel()
176 if (dcdc != tps->driver_data->core_regulator) in tps65023_dcdc_get_voltage_sel()
186 int dcdc = rdev_get_id(dev); in tps65023_dcdc_set_voltage_sel() local
188 if (dcdc != tps->driver_data->core_regulator) in tps65023_dcdc_set_voltage_sel()
H A Dltc3676.c77 int dcdc = rdev_get_id(rdev); in ltc3676_set_suspend_voltage() local
80 dev_dbg(dev, "%s id=%d uV=%d\n", __func__, dcdc, uV); in ltc3676_set_suspend_voltage()
96 int dcdc = rdev_get_id(rdev); in ltc3676_set_suspend_mode() local
98 dev_dbg(dev, "%s id=%d mode=%d\n", __func__, dcdc, mode); in ltc3676_set_suspend_mode()
122 int ret, dcdc = rdev_get_id(rdev); in ltc3676_set_voltage_sel() local
124 dev_dbg(dev, "%s id=%d selector=%d\n", __func__, dcdc, selector); in ltc3676_set_voltage_sel()
/linux/drivers/leds/
H A Dleds-wm8350.c101 ret = regulator_enable(led->dcdc); in wm8350_led_enable()
120 ret = regulator_disable(led->dcdc); in wm8350_led_disable()
129 ret = regulator_enable(led->dcdc); in wm8350_led_disable()
188 struct regulator *isink, *dcdc; in wm8350_led_probe() local
210 dcdc = devm_regulator_get(&pdev->dev, "led_vcc"); in wm8350_led_probe()
211 if (IS_ERR(dcdc)) { in wm8350_led_probe()
213 return PTR_ERR(dcdc); in wm8350_led_probe()
226 led->dcdc = dcdc; in wm8350_led_probe()
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-firefly-icore-3588q.dtsi175 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
188 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
201 vdd_log_s0: dcdc-reg3 {
215 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
228 vdd_ddr_s0: dcdc-reg5 {
242 vdd2_ddr_s3: dcdc-reg6 {
252 vcc_2v0_pldo_s3: dcdc-reg7 {
265 vcc_3v3_s3: dcdc-reg8 {
278 vddq_ddr_s0: dcdc-reg9 {
288 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588-firefly-core-3588j.dtsi178 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
191 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
204 vdd_log_s0: dcdc-reg3 {
218 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
231 vdd_ddr_s0: dcdc-reg5 {
245 vdd2_ddr_s3: dcdc-reg6 {
255 vcc_2v0_pldo_s3: dcdc-reg7 {
268 vcc_3v3_s3: dcdc-reg8 {
281 vddq_ddr_s0: dcdc-reg9 {
291 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588-evb2-v10.dts302 vdd_gpu_s0: dcdc-reg1 {
318 vdd_npu_s0: dcdc-reg2 {
330 vdd_log_s0: dcdc-reg3 {
343 vdd_vdenc_s0: dcdc-reg4 {
356 vdd_gpu_mem_s0: dcdc-reg5 {
373 vdd_npu_mem_s0: dcdc-reg6 {
386 vcc_2v0_pldo_s3: dcdc-reg7 {
399 vdd_vdenc_mem_s0: dcdc-reg8 {
411 vdd2_ddr_s3: dcdc-reg9 {
420 vcc_1v1_nldo_s3: dcdc-reg10 {
[all …]
H A Drk3588-edgeble-neu6a-common.dtsi206 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
219 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
232 vdd_log_s0: dcdc-reg3 {
246 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
259 vdd_ddr_s0: dcdc-reg5 {
273 vdd2_ddr_s3: dcdc-reg6 {
283 vcc_2v0_pldo_s3: dcdc-reg7 {
297 vcc_3v3_s3: dcdc-reg8 {
310 vddq_ddr_s0: dcdc-reg9 {
320 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588-armsom-lm7.dtsi189 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
202 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
215 vdd_log_s0: dcdc-reg3 {
229 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
242 vdd_ddr_s0: dcdc-reg5 {
256 vdd2_ddr_s3: dcdc-reg6 {
266 vcc_2v0_pldo_s3: dcdc-reg7 {
280 vcc_3v3_s3: dcdc-reg8 {
293 vddq_ddr_s0: dcdc-reg9 {
303 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588s-orangepi-cm5.dtsi193 vdd_gpu_s0: dcdc-reg1 {
206 vdd_cpu_lit_s0: dcdc-reg2 {
219 vdd_log_s0: dcdc-reg3 {
233 vdd_vdenc_s0: dcdc-reg4 {
246 vdd_ddr_s0: dcdc-reg5 {
260 vdd2_ddr_s3: dcdc-reg6 {
272 vcc_2v0_pldo_s3: dcdc-reg7 {
285 vcc_3v3_s3: dcdc-reg8 {
298 vddq_ddr_s0: dcdc-reg9 {
308 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588-quartzpro64.dts533 vdd_gpu_s0: dcdc-reg1 {
550 vdd_npu_s0: dcdc-reg2 {
563 vdd_log_s0: dcdc-reg3 {
577 vdd_vdenc_s0: dcdc-reg4 {
591 vdd_gpu_mem_s0: dcdc-reg5 {
609 vdd_npu_mem_s0: dcdc-reg6 {
623 vcc_2v0_pldo_s3: dcdc-reg7 {
637 vdd_vdenc_mem_s0: dcdc-reg8 {
650 vdd2_ddr_s3: dcdc-reg9 {
660 vcc_1v1_nldo_s3: dcdc-reg10 {
[all …]
H A Drk3588s-evb1-v10.dts527 vdd_gpu_s0: dcdc-reg1 {
540 vdd_npu_s0: dcdc-reg2 {
553 vdd_log_s0: dcdc-reg3 {
567 vdd_vdenc_s0: dcdc-reg4 {
580 vdd_gpu_mem_s0: dcdc-reg5 {
593 vdd_npu_mem_s0: dcdc-reg6 {
606 vcc_2v0_pldo_s3: dcdc-reg7 {
620 vdd_vdenc_mem_s0: dcdc-reg8 {
633 vdd2_ddr_s3: dcdc-reg9 {
643 vcc_1v1_nldo_s3: dcdc-reg10 {
[all …]
H A Drk3588-fet3588-c.dtsi287 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
300 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
313 vdd_log_s0: dcdc-reg3 {
327 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
340 vdd_ddr_s0: dcdc-reg5 {
354 vdd2_ddr_s3: dcdc-reg6 {
364 vcc_2v0_pldo_s3: dcdc-reg7 {
378 vcc_3v3_s3: dcdc-reg8 {
391 vddq_ddr_s0: dcdc-reg9 {
401 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588-coolpi-cm5.dtsi385 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
398 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
411 vdd_log_s0: dcdc-reg3 {
425 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
438 vdd_ddr_s0: dcdc-reg5 {
452 vdd2_ddr_s3: dcdc-reg6 {
462 vcc_2v0_pldo_s3: dcdc-reg7 {
476 vcc_3v3_s3: dcdc-reg8 {
489 vddq_ddr_s0: dcdc-reg9 {
499 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588-evb1-v10.dts737 vdd_gpu_s0: dcdc-reg1 {
753 vdd_npu_s0: dcdc-reg2 {
765 vdd_log_s0: dcdc-reg3 {
778 vdd_vdenc_s0: dcdc-reg4 {
791 vdd_gpu_mem_s0: dcdc-reg5 {
808 vdd_npu_mem_s0: dcdc-reg6 {
821 vcc_2v0_pldo_s3: dcdc-reg7 {
834 vdd_vdenc_mem_s0: dcdc-reg8 {
846 vdd2_ddr_s3: dcdc-reg9 {
855 vcc_1v1_nldo_s3: dcdc-reg10 {
[all …]
H A Drk3588-friendlyelec-cm3588.dtsi418 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
431 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
444 vdd_log_s0: dcdc-reg3 {
458 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
471 vdd_ddr_s0: dcdc-reg5 {
485 vdd2_ddr_s3: dcdc-reg6 {
495 vcc_2v0_pldo_s3: dcdc-reg7 {
509 vcc_3v3_s3: dcdc-reg8 {
522 vddq_ddr_s0: dcdc-reg9 {
532 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588-toybrick-x0.dts389 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
402 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
415 vdd_log_s0: dcdc-reg3 {
429 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
442 vdd_ddr_s0: dcdc-reg5 {
456 vdd2_ddr_s3: dcdc-reg6 {
466 vcc_2v0_pldo_s3: dcdc-reg7 {
479 vcc_3v3_s3: dcdc-reg8 {
492 vddq_ddr_s0: dcdc-reg9 {
502 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588s-radxa-cm5.dtsi204 vdd_gpu_s0: dcdc-reg1 {
217 vdd_cpu_lit_s0: dcdc-reg2 {
242 vdd2_ddr_s3: dcdc-reg6 {
252 vcc_2v0_pldo_s3: dcdc-reg7 {
266 vcc_3v3_s3: dcdc-reg8 {
H A Drk3588-turing-rk1.dtsi433 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
446 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
459 vdd_log_s0: dcdc-reg3 {
473 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
486 vdd_ddr_s0: dcdc-reg5 {
500 vdd2_ddr_s3: dcdc-reg6 {
510 vcc_2v0_pldo_s3: dcdc-reg7 {
524 vcc_3v3_s3: dcdc-reg8 {
537 vddq_ddr_s0: dcdc-reg9 {
547 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588-tiger.dtsi493 vdd_gpu_s0: dcdc-reg1 {
506 vdd_cpu_lit_s0: dcdc-reg2 {
519 vdd_log_s0: dcdc-reg3 {
533 vdd_vdenc_s0: dcdc-reg4 {
546 vdd_ddr_s0: dcdc-reg5 {
560 vdd2_ddr_s3: dcdc-reg6 {
570 vcc_2v0_pldo_s3: dcdc-reg7 {
584 vcc_3v3_s3: dcdc-reg8 {
597 vddq_ddr_s0: dcdc-reg9 {
607 vcc_1v8_s3: dcdc-reg10 {
H A Drk3576-luckfox-core3576.dtsi370 vdd_cpu_big_s0: dcdc-reg1 {
384 vdd_npu_s0: dcdc-reg2 {
397 vdd_cpu_lit_s0: dcdc-reg3 {
411 vcc_3v3_s3: dcdc-reg4 {
424 vdd_gpu_s0: dcdc-reg5 {
438 vddq_ddr_s0: dcdc-reg6 {
448 vdd_logic_s0: dcdc-reg7 {
460 vcc_1v8_s3: dcdc-reg8 {
473 vdd2_ddr_s3: dcdc-reg9 {
483 vdd_ddr_s0: dcdc-reg10 {
H A Drk3588s-khadas-edge2.dts465 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
478 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
491 vdd_log_s0: dcdc-reg3 {
505 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
518 vdd_ddr_s0: dcdc-reg5 {
532 vdd2_ddr_s3: dcdc-reg6 {
542 vcc_2v0_pldo_s3: dcdc-reg7 {
556 vcc_3v3_s3: dcdc-reg8 {
569 vddq_ddr_s0: dcdc-reg9 {
579 vcc_1v8_s3: dcdc-reg10 {
H A Drk3582-radxa-e52c.dts441 vdd_gpu_s0: dcdc-reg1 {
454 vdd_cpu_lit_s0: dcdc-reg2 {
467 vdd_logic_s0: dcdc-reg3 {
481 vdd_vdenc_s0: dcdc-reg4 {
494 vdd_ddr_s0: dcdc-reg5 {
508 vdd2_ddr_s3: dcdc-reg6 {
518 vcc_2v0_pldo_s3: dcdc-reg7 {
531 vcc_3v3_s3: vcc_3v3_pmu: dcdc-reg8 {
544 vddq_ddr_s0: dcdc-reg9 {
554 vcc_1v8_s3: dcdc-reg10 {
H A Drk3588-armsom-sige7.dts481 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
495 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
508 vdd_log_s0: dcdc-reg3 {
522 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
535 vdd_ddr_s0: dcdc-reg5 {
549 vdd2_ddr_s3: dcdc-reg6 {
559 vcc_2v0_pldo_s3: dcdc-reg7 {
573 vcc_3v3_s3: dcdc-reg8 {
586 vddq_ddr_s0: dcdc-reg9 {
596 vcc_1v8_s3: dcdc-reg10 {

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