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Searched refs:cmd_reg (Results 1 – 22 of 22) sorted by relevance

/linux/drivers/soc/qcom/
H A Dramp_controller.c51 u8 cmd_reg; member
82 ret = regmap_set_bits(r, d->cmd_reg, RC_ROOT_EN); in rc_wait_for_update()
86 return regmap_read_poll_timeout(r, d->cmd_reg, val, !(val & RC_UPDATE_EN), in rc_wait_for_update()
108 ret = regmap_set_bits(r, d->cmd_reg + RC_REG_CFG_UPDATE, ce); in rc_set_cfg_update()
113 ret = regmap_set_bits(r, d->cmd_reg + RC_REG_CFG_UPDATE, RC_CFG_UPDATE_EN); in rc_set_cfg_update()
118 ret = regmap_read_poll_timeout(r, d->cmd_reg + RC_REG_CFG_UPDATE, val, in rc_set_cfg_update()
129 ret = regmap_write(r, d->cmd_reg + RC_REG_CFG_UPDATE, 0); in rc_set_cfg_update()
134 return regmap_read_poll_timeout(r, d->cmd_reg + RC_REG_CFG_UPDATE, in rc_set_cfg_update()
281 .cmd_reg = 0x0,
/linux/drivers/crypto/ccp/
H A Dplatform-access.c63 u32 cmd_reg; in psp_send_platform_access_msg() local
106 cmd_reg = FIELD_PREP(PSP_CMDRESP_CMD, msg); in psp_send_platform_access_msg()
107 iowrite32(cmd_reg, cmd); in psp_send_platform_access_msg()
128 cmd_reg = ioread32(cmd); in psp_send_platform_access_msg()
129 if (FIELD_GET(PSP_CMDRESP_STS, cmd_reg)) in psp_send_platform_access_msg()
130 req->header.status = FIELD_GET(PSP_CMDRESP_STS, cmd_reg); in psp_send_platform_access_msg()
/linux/drivers/mtd/nand/raw/
H A Dloongson-nand-controller.c92 unsigned int cmd_reg; member
149 op->cmd_reg = LOONGSON_NAND_CMD_STATUS; in loongson_nand_op_cmd_mapping()
152 op->cmd_reg = LOONGSON_NAND_CMD_RESET; in loongson_nand_op_cmd_mapping()
156 op->cmd_reg = LOONGSON_NAND_CMD_READID; in loongson_nand_op_cmd_mapping()
167 op->cmd_reg = LOONGSON_NAND_CMD_ERASE; in loongson_nand_op_cmd_mapping()
175 op->cmd_reg = LOONGSON_NAND_CMD_WRITE; in loongson_nand_op_cmd_mapping()
183 op->cmd_reg = LOONGSON_NAND_CMD_READ; in loongson_nand_op_cmd_mapping()
191 op->cmd_reg = LOONGSON_NAND_CMD_READ; in loongson_nand_op_cmd_mapping()
353 op->cmd_reg |= LOONGSON_NAND_CMD_OP_MAIN; in loongson_nand_trigger_op()
357 op->cmd_reg |= LOONGSON_NAND_CMD_OP_SPARE; in loongson_nand_trigger_op()
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H A Darasan-nand-controller.c140 u32 cmd_reg; member
277 writel_relaxed(nfc_op->cmd_reg, nfc->base + CMD_REG); in anfc_trigger_op()
413 .cmd_reg = in anfc_read_page_hw_ecc()
531 .cmd_reg = in anfc_write_page_hw_ecc()
608 nfc_op->cmd_reg = CMD_PAGE_SIZE(anand->page_sz); in anfc_parse_instructions()
620 nfc_op->cmd_reg |= CMD_1(instr->ctx.cmd.opcode); in anfc_parse_instructions()
622 nfc_op->cmd_reg |= CMD_2(instr->ctx.cmd.opcode); in anfc_parse_instructions()
631 nfc_op->cmd_reg |= CMD_NADDRS(naddrs); in anfc_parse_instructions()
H A Dqcom_nandc.c52 __le32 cmd_reg; member
1620 q_op->cmd_reg = cpu_to_le32(ret); in qcom_parse_instructions()
1717 nandc->regs->cmd = q_op.cmd_reg; in qcom_read_status_exec()
1774 nandc->regs->cmd = q_op.cmd_reg; in qcom_read_id_type_exec()
1816 } else if (q_op.cmd_reg == cpu_to_le32(OP_BLOCK_ERASE)) { in qcom_misc_cmd_type_exec()
1817 q_op.cmd_reg |= cpu_to_le32(PAGE_ACC | LAST_PAGE); in qcom_misc_cmd_type_exec()
1823 } else if (q_op.cmd_reg != cpu_to_le32(OP_RESET_DEVICE)) { in qcom_misc_cmd_type_exec()
1834 nandc->regs->cmd = q_op.cmd_reg; in qcom_misc_cmd_type_exec()
1838 if (q_op.cmd_reg == cpu_to_le32(OP_BLOCK_ERASE)) in qcom_misc_cmd_type_exec()
1877 q_op.cmd_reg |= cpu_to_le32(PAGE_ACC | LAST_PAGE); in qcom_param_page_type_exec()
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/linux/drivers/mmc/host/
H A Ddavinci_mmc.c260 u32 cmd_reg = 0; in mmc_davinci_start_command() local
291 cmd_reg |= MMCCMD_BSYEXP; in mmc_davinci_start_command()
294 cmd_reg |= MMCCMD_RSPFMT_R1456; in mmc_davinci_start_command()
297 cmd_reg |= MMCCMD_RSPFMT_R2; in mmc_davinci_start_command()
300 cmd_reg |= MMCCMD_RSPFMT_R3; in mmc_davinci_start_command()
303 cmd_reg |= MMCCMD_RSPFMT_NONE; in mmc_davinci_start_command()
310 cmd_reg |= cmd->opcode; in mmc_davinci_start_command()
314 cmd_reg |= MMCCMD_DMATRIG; in mmc_davinci_start_command()
318 cmd_reg |= MMCCMD_DMATRIG; in mmc_davinci_start_command()
322 cmd_reg |= MMCCMD_WDATX; in mmc_davinci_start_command()
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H A Dsdhci-uhs2.c638 int cmd_reg; in __sdhci_uhs2_send_command() local
666 cmd_reg = FIELD_PREP(SDHCI_UHS2_CMD_PACK_LEN_MASK, cmd->uhs2_cmd->packet_len); in __sdhci_uhs2_send_command()
668 cmd_reg |= SDHCI_UHS2_CMD_DATA; in __sdhci_uhs2_send_command()
670 cmd_reg |= SDHCI_UHS2_CMD_CMD12; in __sdhci_uhs2_send_command()
675 cmd_reg |= SDHCI_UHS2_CMD_TRNS_ABORT; in __sdhci_uhs2_send_command()
680 cmd_reg |= SDHCI_UHS2_CMD_DORMANT; in __sdhci_uhs2_send_command()
682 DBG("0x%x is set to UHS2 CMD register.\n", cmd_reg); in __sdhci_uhs2_send_command()
684 sdhci_writew(host, cmd_reg, SDHCI_UHS2_CMD); in __sdhci_uhs2_send_command()
/linux/arch/m68k/sun3/
H A Dintersil.c37 intersil_clock->cmd_reg = STOP_VAL; in sun3_hwclk()
63 intersil_clock->cmd_reg = START_VAL; in sun3_hwclk()
H A Dconfig.c155 intersil_clock->cmd_reg=(INTERSIL_RUN|INTERSIL_INT_DISABLE|INTERSIL_24H_MODE); in sun3_sched_init()
159 intersil_clock->cmd_reg=(INTERSIL_RUN|INTERSIL_INT_ENABLE|INTERSIL_24H_MODE); in sun3_sched_init()
/linux/drivers/parisc/
H A Dled.c395 int __init register_led_driver(int model, unsigned long cmd_reg, unsigned long data_reg) in register_led_driver() argument
405 LCD_CMD_REG = (cmd_reg == LED_CMD_REG_NONE) ? 0 : cmd_reg; in register_led_driver()
/linux/drivers/cxl/
H A Dpci.c205 u64 cmd_reg, status_reg; in __cxl_pci_mbox_send_cmd() local
248 cmd_reg = FIELD_PREP(CXLDEV_MBOX_CMD_COMMAND_OPCODE_MASK, in __cxl_pci_mbox_send_cmd()
254 cmd_reg |= FIELD_PREP(CXLDEV_MBOX_CMD_PAYLOAD_LENGTH_MASK, in __cxl_pci_mbox_send_cmd()
260 writeq(cmd_reg, cxlds->regs.mbox + CXLDEV_MBOX_CMD_OFFSET); in __cxl_pci_mbox_send_cmd()
353 cmd_reg = readq(cxlds->regs.mbox + CXLDEV_MBOX_CMD_OFFSET); in __cxl_pci_mbox_send_cmd()
354 out_len = FIELD_GET(CXLDEV_MBOX_CMD_PAYLOAD_LENGTH_MASK, cmd_reg); in __cxl_pci_mbox_send_cmd()
/linux/arch/parisc/include/asm/
H A Dled.h28 int register_led_driver(int model, unsigned long cmd_reg, unsigned long data_reg);
/linux/arch/m68k/include/asm/
H A Dintersil.h43 unsigned char cmd_reg; member
/linux/include/linux/
H A Dhid-over-i2c.h106 __le16 cmd_reg; member
/linux/drivers/scsi/aic94xx/
H A Daic94xx_init.c140 u16 cmd_reg; in asd_map_ha() local
142 err = pci_read_config_word(asd_ha->pcidev, PCI_COMMAND, &cmd_reg); in asd_map_ha()
150 if (cmd_reg & PCI_COMMAND_MEMORY) { in asd_map_ha()
153 } else if (cmd_reg & PCI_COMMAND_IO) { in asd_map_ha()
/linux/tools/testing/selftests/vfio/lib/drivers/dsa/
H A Ddsa.c117 union idxd_command_reg cmd_reg = { .cmd = cmd }; in dsa_command() local
123 writel(cmd_reg.bits, bar0 + IDXD_CMD_OFFSET); in dsa_command()
/linux/drivers/gpu/drm/i915/gvt/
H A Dcmd_parser.c1040 #define cmd_reg(s, i) \ macro
1060 cmd_reg(s, i) == i915_mmio_reg_offset(DERRMR)) in cmd_handler_lri()
1067 ret |= cmd_reg_handler(s, cmd_reg(s, i), i, "lri"); in cmd_handler_lri()
1086 ret |= cmd_reg_handler(s, cmd_reg(s, i), i, "lrr-src"); in cmd_handler_lrr()
1089 ret |= cmd_reg_handler(s, cmd_reg(s, i + 1), i, "lrr-dst"); in cmd_handler_lrr()
1112 ret |= cmd_reg_handler(s, cmd_reg(s, i), i, "lrm"); in cmd_handler_lrm()
1136 ret |= cmd_reg_handler(s, cmd_reg(s, i), i, "srm"); in cmd_handler_srm()
1199 ret = cmd_reg_handler(s, cmd_reg(s, 2), 1, "pipe_ctrl"); in cmd_handler_pipe_control()
/linux/drivers/atm/
H A Diphase.h649 ffreg_t cmd_reg; /* Command register */ member
729 rreg_t cmd_reg; /* Command register */ member
/linux/drivers/dma/qcom/
H A Dgpi.c676 void __iomem *cmd_reg; in gpi_send_cmd() local
691 cmd_reg = IS_CHAN_CMD(gpi_cmd) ? gchan->ch_cmd_reg : gpii->ev_cmd_reg; in gpi_send_cmd()
694 gpi_write_reg(gpii, cmd_reg, cmd); in gpi_send_cmd()
/linux/drivers/usb/host/
H A Dxhci-ring.c1997 u32 portsc, cmd_reg; in handle_port_status() local
2059 cmd_reg = readl(&xhci->op_regs->command); in handle_port_status()
2060 if (!(cmd_reg & CMD_RUN)) { in handle_port_status()
/linux/drivers/scsi/
H A Dadvansys.c8665 static int AscWriteEEPCmdReg(PortAddr iop_base, uchar cmd_reg) in AscWriteEEPCmdReg() argument
8671 AscSetChipEEPCmd(iop_base, cmd_reg); in AscWriteEEPCmdReg()
8674 if (read_back == cmd_reg) in AscWriteEEPCmdReg()
8688 uchar cmd_reg; in AscReadEEPWord() local
8692 cmd_reg = addr | ASC_EEP_CMD_READ; in AscReadEEPWord()
8693 AscWriteEEPCmdReg(iop_base, cmd_reg); in AscReadEEPWord()
H A Dipr.c8165 u16 cmd_reg; in ipr_reset_alert() local
8169 rc = pci_read_config_word(ioa_cfg->pdev, PCI_COMMAND, &cmd_reg); in ipr_reset_alert()
8171 if ((rc == PCIBIOS_SUCCESSFUL) && (cmd_reg & PCI_COMMAND_MEMORY)) { in ipr_reset_alert()