| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| H A D | gf100.c | 279 u32 clk0, clk1 = 0; in calc_clk() local
286 clk0 = calc_src(clk, idx, freq, &src0, &div0); in calc_clk()
287 clk0 = calc_div(clk, idx, clk0, freq, &div1D); in calc_clk()
290 if (clk0 != freq && (0x00004387 & (1 << idx))) { in calc_clk()
299 if (abs((int)freq - clk0) <= abs((int)freq - clk1)) { in calc_clk()
311 info->freq = clk0; in calc_clk()
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| H A D | mcp77.c | 184 u32 clk0 = src, clk1 = src; in calc_P() local
186 if (clk0 <= target) { in calc_P()
187 clk1 = clk0 << (*div ? 1 : 0); in calc_P()
190 clk0 >>= 1; in calc_P()
193 if (target - clk0 <= clk1 - target) in calc_P()
194 return clk0; in calc_P()
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| H A D | gk104.c | 293 u32 clk0, clk1 = 0; in calc_clk() local
300 clk0 = calc_src(clk, idx, freq, &src0, &div0); in calc_clk()
301 clk0 = calc_div(clk, idx, clk0, freq, &div1D); in calc_clk()
304 if (clk0 != freq && (0x0000ff87 & (1 << idx))) { in calc_clk()
313 if (abs((int)freq - clk0) <= abs((int)freq - clk1)) { in calc_clk()
324 info->freq = clk0; in calc_clk()
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| H A D | nv50.c | 347 u32 clk0 = src, clk1 = src; in calc_div() local
349 if (clk0 <= target) { in calc_div()
350 clk1 = clk0 << (*div ? 1 : 0); in calc_div()
353 clk0 >>= 1; in calc_div()
356 if (target - clk0 <= clk1 - target) in calc_div()
357 return clk0; in calc_div()
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| /linux/drivers/clk/ti/ |
| H A D | adpll.c | 266 char *name, struct clk *clk0, in ti_adpll_init_mux() argument
278 parents[0] = __clk_get_name(clk0); in ti_adpll_init_mux()
575 char *name, struct clk *clk0, in ti_adpll_init_clkout() argument
606 parent_names[0] = __clk_get_name(clk0); in ti_adpll_init_clkout()
|
| /linux/drivers/clk/zynq/ |
| H A D | clkc.c | 174 static void __init zynq_clk_register_periph_clk(enum zynq_clk clk0, in zynq_clk_register_periph_clk() argument
197 clks[clk0] = clk_register_gate(NULL, clk_name0, div_name, in zynq_clk_register_periph_clk()
209 clks[clk0] = ERR_PTR(-ENOMEM); in zynq_clk_register_periph_clk()
|
| /linux/drivers/clk/ |
| H A D | clk_test.c | 3089 struct clk_dummy_context clk0; member
3169 clk_assigned_rates_register_clk(test, &ctx->clk0, np, in clk_assigned_rates_test_init()
3174 &ctx->clk0.hw)); in clk_assigned_rates_test_init()
3182 data->hws[0] = &ctx->clk0.hw; in clk_assigned_rates_test_init()
3205 KUNIT_EXPECT_EQ(test, ctx->clk0.rate, ASSIGNED_RATES_0_RATE); in clk_assigned_rates_assigns_one()
3212 KUNIT_EXPECT_EQ(test, ctx->clk0.rate, ASSIGNED_RATES_0_RATE); in clk_assigned_rates_assigns_multiple()
3221 KUNIT_EXPECT_NE(test, ctx->clk0.rate, ASSIGNED_RATES_0_RATE); in clk_assigned_rates_skips()
3222 KUNIT_EXPECT_EQ(test, ctx->clk0.rate, test_param->rate0); in clk_assigned_rates_skips()
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| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3562-pinctrl.dtsi | 16 camm0_clk0_out: camm0-clk0-out {
30 camm1_clk0_out: camm1-clk0-out {
116 clk0 {
118 clk0_32k_out: clk0-32k-out {
827 pdmm0_clk0: pdmm0-clk0 {
869 pdmm1_clk0: pdmm1-clk0 {
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| H A D | rk3576-pinctrl.dtsi | 39 cam_clk0m0_clk0: cam_clk0m0-clk0 {
46 cam_clk0m1_clk0: cam_clk0m1-clk0 {
1028 ethm0_clk0_25m_out: ethm0-clk0-25m-out {
1035 ethm1_clk0_25m_out: ethm1-clk0-25m-out {
2234 pdm0m0_clk0: pdm0m0-clk0 {
2276 pdm0m1_clk0: pdm0m1-clk0 {
2318 pdm0m2_clk0: pdm0m2-clk0 {
2360 pdm0m3_clk0: pdm0m3-clk0 {
2404 pdm1m0_clk0: pdm1m0-clk0 {
2446 pdm1m1_clk0: pdm1m1-clk0 {
[all …]
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| H A D | rk3528-pinctrl.dtsi | 558 pdm_clk0: pdm-clk0 {
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| /linux/arch/arm/boot/dts/nxp/lpc/ |
| H A D | lpc4350-hitex-eval.dts | 230 pins = "clk0", "clk1", "clk2", "clk3";
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| H A D | lpc4357-myd-lpc4357.dts | 185 pins = "clk0";
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| H A D | lpc4357-ea4357-devkit.dts | 260 pins = "clk0", "clk1", "clk2", "clk3";
|
| /linux/drivers/pinctrl/ |
| H A D | pinctrl-lpc18xx.c | 416 LPC_N(clk0, 0xc00, EMC, CLKOUT, R, R, SDMMC, EMC_ALT, SSP1, ENET, 0, HS);
625 LPC18XX_PIN(clk0, PIN_CLK0),
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| /linux/arch/arm64/boot/dts/exynos/ |
| H A D | exynos2200-pinctrl.dtsi | 1724 dmic_bus_clk0: dmic-bus-clk0-pins {
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | msm8916.dtsi | 2091 "mi2s-bit-clk0",
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| H A D | msm8939.dtsi | 1860 "mi2s-bit-clk0",
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| H A D | sc7180.dtsi | 4064 "mi2s-bit-clk0", "mi2s-bit-clk1";
|