| /linux/tools/perf/Documentation/ |
| H A D | perf-c2c.txt | 20 you to track down the cacheline contentions.
95 Specify sorting fields for single cacheline display.
141 Group the detection of shared cacheline events into double cacheline
143 feature, which causes cacheline sharing to behave like the cacheline
155 The perf c2c record command setup options related to HITM cacheline analysis
214 - sort all the data based on the cacheline address
215 - store access details for each cacheline
221 2) offsets details for each cacheline
223 For each cacheline in the 1) list we display following data:
227 - zero based index to identify the cacheline
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| H A D | perf-amd-ibs.txt | 167 cacheline analyser tool. Both of them internally uses IBS Op PMU on AMD.
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| H A D | perf-mem.txt | 114 - dcacheline: the cacheline the data address is on at the time of the sample
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| /linux/drivers/gpu/drm/i915/gt/ |
| H A D | intel_ring.h | 110 #define cacheline(a) round_down(a, CACHELINE_BYTES) in assert_ring_tail_valid() macro
111 GEM_BUG_ON(cacheline(tail) == cacheline(head) && tail < head); in assert_ring_tail_valid()
112 #undef cacheline in assert_ring_tail_valid()
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| H A D | selftest_timeline.c | 97 unsigned long cacheline; in __mock_hwsp_timeline() local
110 cacheline = hwsp_cacheline(tl); in __mock_hwsp_timeline()
111 err = radix_tree_insert(&state->cachelines, cacheline, tl); in __mock_hwsp_timeline()
115 cacheline); in __mock_hwsp_timeline()
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| /linux/drivers/soc/qcom/ |
| H A D | smem.c | 155 __le32 cacheline; member
209 size_t cacheline; member
301 size_t cacheline) in phdr_to_first_cached_entry() argument
306 return p + le32_to_cpu(phdr->size) - ALIGN(sizeof(*e), cacheline); in phdr_to_first_cached_entry()
335 cached_entry_next(struct smem_private_entry *e, size_t cacheline) in cached_entry_next() argument
339 return p - le32_to_cpu(e->size) - ALIGN(sizeof(*e), cacheline); in cached_entry_next()
635 e = phdr_to_first_cached_entry(phdr, part->cacheline); in qcom_smem_get_private()
663 e = cached_entry_next(e, part->cacheline); in qcom_smem_get_private()
1010 smem->global_partition.cacheline = le32_to_cpu(entry->cacheline); in qcom_smem_set_global_partition()
1063 smem->partitions[remote_host].cacheline = le32_to_cpu(entry->cacheline); in qcom_smem_enumerate_partitions()
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| /linux/include/asm-generic/ |
| H A D | vmlinux.lds.h | 1090 #define PERCPU_INPUT(cacheline) \ argument
1094 . = ALIGN(cacheline); \
1098 . = ALIGN(cacheline); \
1100 . = ALIGN(cacheline); \
1115 #define PERCPU_SECTION(cacheline) \ argument
1118 PERCPU_INPUT(cacheline) \
1140 #define RW_DATA(cacheline, pagealigned, inittask) \ argument
1146 CACHE_HOT_DATA(cacheline) \
1147 CACHELINE_ALIGNED_DATA(cacheline) \
1148 READ_MOSTLY_DATA(cacheline) \
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| /linux/drivers/md/bcache/ |
| H A D | bset.c | 526 unsigned int cacheline, in cacheline_to_bkey() argument
529 return ((void *) t->data) + cacheline * BSET_CACHELINE + offset * 8; in cacheline_to_bkey()
538 unsigned int cacheline, in bkey_to_cacheline_offset() argument
541 return (u64 *) k - (u64 *) cacheline_to_bkey(t, cacheline, 0); in bkey_to_cacheline_offset()
558 static struct bkey *table_to_bkey(struct bset_tree *t, unsigned int cacheline) in table_to_bkey() argument
560 return cacheline_to_bkey(t, cacheline, t->prev[cacheline]); in table_to_bkey()
694 unsigned int j, cacheline = 1; in bch_bset_build_written_tree() local
715 while (bkey_to_cacheline(t, k) < cacheline) { in bch_bset_build_written_tree()
721 t->tree[j].m = bkey_to_cacheline_offset(t, cacheline++, k); in bch_bset_build_written_tree()
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| /linux/Documentation/edac/ |
| H A D | memory_repair.rst | 55 sparing has cacheline/row/bank/rank sparing granularities. For example, in
72 cacheline. Row sparing is provided as an alternative to PPR sparing functions
132 for this operation, cacheline/row/bank/rank sparing, vary in terms of the
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| /linux/Documentation/admin-guide/hw-vuln/ |
| H A D | indirect-target-selection.rst | 8 of indirect branches and RETs located in the lower half of a cacheline.
58 in the lower half of the cacheline are vulnerable to ITS, the basic idea behind
64 second half of the cacheline. Not all retpoline sites are patched to thunks, if
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| /linux/Documentation/translations/zh_CN/locking/ |
| H A D | mutex-design.rst | 60 （cacheline bouncing）这种昂贵的开销。一个类MCS锁是为实现睡眠锁的
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| /linux/Documentation/arch/sparc/ |
| H A D | adi.rst | 35 size is same as cacheline size which is 64 bytes. A task that sets ADI
103 the corresponding cacheline, a memory corruption trap occurs. By
123 the corresponding cacheline, a memory corruption trap occurs. If
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| /linux/kernel/ |
| H A D | Kconfig.hz | 14 contention and cacheline bounces as a result of timer interrupts.
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| /linux/arch/sparc/kernel/ |
| H A D | prom_irqtrans.c | 356 static unsigned char cacheline[64] in tomatillo_wsync_handler() local
367 "i" (FPRS_FEF), "r" (&cacheline[0]), in tomatillo_wsync_handler()
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| H A D | cherrs.S | 203 sub %g1, %g2, %g1 ! Move down 1 cacheline
215 subcc %g1, %g2, %g1 ! Next cacheline
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| /linux/Documentation/translations/zh_CN/core-api/ |
| H A D | cachetlb.rst | 196 加载到不同的cacheline中就会出现别名现象。
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| /linux/arch/parisc/kernel/ |
| H A D | perf_asm.S | 132 ; Cacheline start (32-byte cacheline)
145 ; Cacheline start (32-byte cacheline)
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| /linux/Documentation/locking/ |
| H A D | mutex-design.rst | 55 cacheline bouncing that common test-and-set spinlock implementations
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| /linux/Documentation/kernel-hacking/ |
| H A D | false-sharing.rst | 66 cache hot and save cacheline/TLB, like a lock and the data protected
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| /linux/Documentation/arch/x86/ |
| H A D | tdx.rst | 149 write to a TDX private memory cacheline will silently "poison" the
154 cacheline lands at the memory controller. The CPU does these via
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-edac-memory-repair | 45 - cacheline-sparing
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| /linux/Documentation/ |
| H A D | atomic_t.txt | 358 loop body. As a result there is no guarantee what so ever the cacheline
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| /linux/Documentation/driver-api/ |
| H A D | edac.rst | 46 lockstep is enabled, the cacheline is doubled, but it generally brings
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| /linux/Documentation/mm/ |
| H A D | multigen_lru.rst | 191 promotes hot pages. If the scan was done cacheline efficiently, it
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| /linux/security/ |
| H A D | Kconfig.hardening | 337 best effort at restricting randomization to cacheline-sized
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