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Searched refs:PSEC_PER_SEC (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/phy/
H A Dphy-core-mipi-dphy.c36 ui = ALIGN(PSEC_PER_SEC, hs_clk_rate); in phy_mipi_dphy_calc_config()
114 ui = ALIGN(PSEC_PER_SEC, cfg->hs_clk_rate); in phy_mipi_dphy_config_validate()
/linux/drivers/iio/trigger/
H A Diio-trig-hrtimer.c20 #define PSEC_PER_SEC 1000000000000LL macro
73 period = PSEC_PER_SEC; in iio_hrtimer_store_sampling_frequency()
/linux/include/vdso/
H A Dtime64.h12 #define PSEC_PER_SEC 1000000000000LL macro
/linux/drivers/gpu/drm/rockchip/
H A Ddw-mipi-dsi2-rockchip.c32 #define PSEC_PER_SEC 1000000000000LL macro
189 ui = ALIGN(PSEC_PER_SEC, hstx_clk); in dw_mipi_dsi2_phy_get_timing()
/linux/drivers/dpll/zl3073x/
H A Dprop.c224 props->dpll_props.phase_gran = f ? div_u64(PSEC_PER_SEC, f) : 1; in zl3073x_pin_props_get()
H A Ddpll.c448 conn_period = div_s64(PSEC_PER_SEC, conn_freq); in zl3073x_dpll_input_pin_phase_offset_get()
/linux/drivers/phy/rockchip/
H A Dphy-rockchip-inno-dsidphy.c473 t_txbyteclkhs = div_u64(PSEC_PER_SEC, txbyteclkhs); in inno_dsidphy_mipi_mode_enable()
477 t_txclkesc = div_u64(PSEC_PER_SEC, txclkesc); in inno_dsidphy_mipi_mode_enable()
/linux/drivers/net/ethernet/mscc/
H A Docelot_ptp.c155 adj = PSEC_PER_SEC << 16; in ocelot_ptp_adjfine()
/linux/drivers/media/i2c/
H A Dtc358746.c580 return tc358746_cfg_to_cnt(cfg_val, clk_hz, PSEC_PER_SEC); in tc358746_ps_to_cnt()