Searched refs:PGA (Results 1 – 12 of 12) sorted by relevance
14 The AD7191 is a high precision, low noise, 24-bit Σ-Δ ADC with integrated PGA.25 (Output Data Rate) and PGA (Programmable Gain Amplifier) settings. These45 PGA Configuration48 The PGA can be configured either through GPIO control or pin-strapping:54 Available PGA gain settings:108 - Configurable gain via PGA113 - Configurable gain via PGA
19 including a programmable gain amplifier (PGA) and an analog-to-digital
26 Startup Order :- DAC --> Mixers --> Output PGA --> Digital Unmute28 Shutdown Order :- Digital Mute --> Output PGA --> Mixers --> DAC31 a PGA (programmable gain amplifier) before being output to the speakers.43 Startup Order - Input PGA --> Mixers --> ADC45 Shutdown Order - ADC --> Mixers --> Input PGA
81 PGA
20 * amixer cset name='Input PGA Volume' 25
24 * > amixer set "Mixin PGA" on25 * > amixer set "Mixin PGA" 50%
176 int PGA; member1247 if (state->PGA) in InitFE()1496 state->PGA = 0; in SetDeviceTypeId()1510 state->PGA = 1; in SetDeviceTypeId()2550 state->PGA = 0; in CDRXD()2668 if (state->PGA) { in DRXD_init()
101 0x06 pgagain PGA gain in dB
37 Here is an example of a PGA (Pin Grid Array) chip seen from underneath::404 Here is an example of a PGA (Pin Grid Array) chip seen from underneath::425 This is not tetris. The game to think of is chess. Not all PGA/BGA packages432 The example 8x8 PGA package above will have pin numbers 0 through 63 assigned
126 Address, CIA) - a 383 pin plastic PGA). It provides a DRAM
821 ISA830D "IBM PGA"
2363 The UDA1342 is an NXP audio codec, support 2x Stereo audio ADC (4x PGA