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/linux/Documentation/PCI/endpoint/
H A Dpci-test-function.rst44 Bit 0 raise legacy IRQ
45 Bit 1 raise MSI IRQ
46 Bit 2 raise MSI-X IRQ
47 Bit 3 read command (read data from RC buffer)
48 Bit 4 write command (write data to RC buffer)
49 Bit 5 copy command (copy data from one RC buffer to another RC buffer)
59 Bit 0 read success
60 Bit 1 read fail
61 Bit 2 write success
62 Bit 3 write fail
[all …]
/linux/Documentation/w1/slaves/
H A Dw1_ds2413.rst29 Bit 0: PIOA Pin State
30 Bit 1: PIOA Output Latch State
31 Bit 2: PIOB Pin State
32 Bit 3: PIOB Output Latch State
33 Bit 4-7: Complement of Bit 3 to Bit 0 (verified by the kernel module)
45 Bit 0: PIOA
46 Bit 1: PIOB
47 Bit 2-7: No matter (driver will set it to "1"s)
H A Dw1_ds28e04.rst7 * Maxim DS28E04-100 4096-Bit Addressable 1-Wire EEPROM with PIO
39 The current status of the PIO's is returned as an 8 bit value. Bit 0/1
/linux/Documentation/networking/
H A Doa-tc6-framework.rst176 DNC (Bit 31) - Data-Not-Control flag. This flag specifies the type of SPI
181 SEQ (Bit 30) - Data Chunk Sequence. This bit is used to indicate an
184 NORX (Bit 29) - No Receive flag. The SPI host may set this bit to prevent
191 RSVD (Bit 28..24) - Reserved: All reserved bits shall be ‘0’.
193 VS (Bit 23..22) - Vendor Specific. These bits are implementation specific.
197 DV (Bit 21) - Data Valid flag. The SPI host uses this bit to indicate
203 SV (Bit 20) - Start Valid flag. The SPI host shall set this bit when the
209 SWO (Bit 19..16) - Start Word Offset. When SV = 1, this field shall
215 RSVD (Bit 15) - Reserved: All reserved bits shall be ‘0’.
217 EV (Bit 14) - End Valid flag. The SPI host shall set this bit when the end
[all …]
/linux/Documentation/networking/device_drivers/cellular/qualcomm/
H A Drmnet.rst37 Bit 0 1 2-7 8-15 16-31
40 Bit 32-x
64 Bit 0 1 2-7 8-15 16-31
67 Bit 32-(x-33) (x-32)-x
89 Bit 0-14 15 16-31
92 Bit 31-47 48-64
118 Bit 0 1 2-7 8-15 16-31
121 Bit 32-x
146 Bit 0 - 6 7 8-15 16-31
170 Bit 0 1 2-7 8 - 15 16 - 31
[all …]
/linux/Documentation/driver-api/cxl/platform/acpi/
H A Dcedt.rst54 Bit[0]: CXL Type 2 Memory
55 Bit[1]: CXL Type 3 Memory
56 Bit[2]: Volatile Memory
57 Bit[3]: Persistent Memory
58 Bit[4]: Fixed Config (HPA cannot be re-used)
/linux/Documentation/devicetree/bindings/media/
H A Dti-am437x-vpfe.txt15 1 - 8 Bit BT656 Interface.
16 2 - 10 Bit BT656 Interface.
17 3 - YCbCr 8 Bit Interface.
18 4 - YCbCr 16 Bit Interface.
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-acpi72 Bit [0] Set if the device is present.
73 Bit [1] Set if the device is enabled and decoding its
75 Bit [2] Set if the device should be shown in the UI.
76 Bit [3] Set if the device is functioning properly (cleared
78 Bit [4] Set if the battery is present.
85 Bit 0 can be clear (not present) with bit [3] set (device is
/linux/Documentation/i2c/busses/
H A Di2c-mlxcpld.rst31 Bit 7 - SMBus block read support.
41 Bit 0, 0 = write, 1 = read.
49 Bit 0 - transaction is completed.
50 Bit 4 - ACK/NACK.
/linux/drivers/firmware/arm_scmi/vendors/imx/
H A Dimx95.rst220 | |Bit[0] Graceful request: |
252 | |Bit[0] Graceful request: |
335 | |Bit[3] Wake (resume) notification: |
338 | |Bit[2] Suspend (sleep) notification: |
341 | |Bit[1] Shutdown (off) notification: |
344 | |Bit[0] Boot (on) notification: |
392 | |Bit[28] Valid origin: |
397 | |Bit[23] Valid err ID: |
401 | |Bit[7:0] Reason(WDOG, POR, FCCU and etc): |
411 | |Bit[28] Valid origin: |
[all …]
/linux/Documentation/arch/arm/pxa/
H A Dmfp.rst165 Bit 3: RESERVED
166 Bit 4: EDGE_RISE_EN - enable detection of rising edge on this pin
167 Bit 5: EDGE_FALL_EN - enable detection of falling edge on this pin
168 Bit 6: EDGE_CLEAR - disable edge detection on this pin
169 Bit 7: SLEEP_OE_N - enable outputs during low power modes
170 Bit 8: SLEEP_DATA - output data on the pin during low power modes
171 Bit 9: SLEEP_SEL - selection control for low power modes signals
172 Bit 13: PULLDOWN_EN - enable the internal pull-down resistor on this pin
173 Bit 14: PULLUP_EN - enable the internal pull-up resistor on this pin
174 Bit 15: PULL_SEL - pull state controlled by selected alternate function
[all …]
/linux/Documentation/scsi/
H A Daic7xxx.rst26 aic7770 10 EISA/VL 10MHz 16Bit 4 1
27 aic7850 10 PCI/32 10MHz 8Bit 3
28 aic7855 10 PCI/32 10MHz 8Bit 3
29 aic7856 10 PCI/32 10MHz 8Bit 3
30 aic7859 10 PCI/32 20MHz 8Bit 3
31 aic7860 10 PCI/32 20MHz 8Bit 3
32 aic7870 10 PCI/32 10MHz 16Bit 16
33 aic7880 10 PCI/32 20MHz 16Bit 16
34 aic7890 20 PCI/32 40MHz 16Bit 16 3 4 5 6 7 8
35 aic7891 20 PCI/64 40MHz 16Bit 16 3 4 5 6 7 8
[all …]
/linux/Documentation/devicetree/bindings/input/
H A Dpxa27x-keypad.txt28 - marvell,rotary0 : It is a u32 value. Bit[31:16] is the
29 linux key-code for rotary up. Bit[15:0] is the linux key-code
34 axes measurement in the device. It is a u32 value. Bit[31:16]
35 is for rotary 1, and Bit[15:0] is for rotary 0.
/linux/drivers/media/pci/cx25821/
H A Dcx25821-biffuncs.h12 #define SetBit(Bit) (1 << Bit) argument
H A Dcx25821.h360 #define Set_GPIO_Bit(Bit) (1 << Bit) argument
361 #define Clear_GPIO_Bit(Bit) (~(1 << Bit)) argument
/linux/Documentation/virt/kvm/arm/
H A Dfw-pseudo-registers.rst105 Bit-0: KVM_REG_ARM_STD_BIT_TRNG_V1_0:
114 Bit-0: KVM_REG_ARM_STD_HYP_BIT_PV_TIME:
123 Bit-0: KVM_REG_ARM_VENDOR_HYP_BIT_FUNC_FEAT
127 Bit-1: KVM_REG_ARM_VENDOR_HYP_BIT_PTP:
135 Bit-0: KVM_REG_ARM_VENDOR_HYP_BIT_DISCOVER_IMPL_VER
139 Bit-1: KVM_REG_ARM_VENDOR_HYP_BIT_DISCOVER_IMPL_CPUS
/linux/drivers/eisa/
H A Deisa.ids50 ADI0001 "Lightning Networks 32-Bit EISA Ethernet LAN Adapter"
55 AIM0002 "AUVA OPTi/EISA 32-Bit 486 All-in-One System Board"
134 BUS4201 "BusTek/BusLogic Bt74xB 32-Bit Bus Master EISA-to-SCSI Host Adapter"
135 BUS4202 "BusTek/BusLogic Bt74xC 32-Bit Bus Master EISA-to-SCSI Host Adapter"
136 BUS6001 "BusTek/BusLogic Bt760 32-Bit Bus Master EISA-to-Ethernet Controller"
137 BUS6301 "BusTek/BusLogic Bt763E EISA 32-Bit 82596-based Ethernet Controller"
156 COG5000 "Cogent eMASTER+ AT Combo 16-Bit Workstation Ethernet Adapter"
158 COG9002 "Cogent eMASTER+ EISA XL 32-Bit Burst-mode Ethernet Adapter"
233 CPQ4001 "Compaq 32-Bit Intelligent Drive Array Controller"
235 CPQ4010 "Compaq 32-Bit Intelligent Drive Array Expansion Controller"
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Darmada-xp-crs305-1g-4s-bit.dts3 * Device Tree file for MikroTik CRS305-1G-4S+ Bit board
12 model = "MikroTik CRS305-1G-4S+ Bit";
H A Darmada-xp-crs326-24g-2s-bit.dts3 * Device Tree file for MikroTik CRS326-24G-2S+ Bit board
12 model = "MikroTik CRS326-24G-2S+ Bit";
H A Darmada-xp-crs328-4c-20s-4s-bit.dts3 * Device Tree file for MikroTik CRS328-4C-20S-4S+ Bit board
12 model = "MikroTik CRS328-4C-20S-4S+ Bit";
/linux/Documentation/hwmon/
H A Dabituguru-datasheet.rst223 Bit 0:
226 Bit 1:
229 Bit 2:
232 Bit 3:
235 Bit 4:
238 Bit 5:
241 Bit 6:
244 Bit 7:
313 Bit 0:
316 Bit 3:
[all …]
/linux/Documentation/virt/kvm/x86/
H A Dmsr.rst209 Bits 5-4 of the MSR are reserved and should be zero. Bit 0 is set to 1
211 Bit 1 is 1 if asynchronous page faults can be injected when vcpu is in
212 cpl == 0. Bit 2 is 1 if asynchronous page faults are delivered to L1 as
213 #PF vmexits. Bit 2 can be set only if KVM_FEATURE_ASYNC_PF_VMEXIT is
214 present in CPUID. Bit 3 enables interrupt based delivery of 'page ready'
215 events. Bit 3 can only be set if KVM_FEATURE_ASYNC_PF_INT is present in
310 Bit 0 is 1 when PV end of interrupt is enabled on the vcpu; 0
311 when disabled. Bit 1 is reserved and must be zero. When PV end of
348 Bit 0 enables (1) or disables (0) host-side HLT polling logic.
384 CPUID. Bit 0 represents whether live migration of the guest is allowed.
/linux/Documentation/devicetree/bindings/hsi/
H A Dclient-devices.txt9 - hsi-rx-mode: Receiver Bit transmission mode ("stream" or "frame")
10 - hsi-tx-mode: Transmitter Bit transmission mode ("stream" or "frame")
/linux/Documentation/translations/zh_CN/PCI/
H A Dacpi-info.rst103 常规标志: Bit [0] 被忽略。
106 常规标志: Bit [0] 消费者/生产者:
/linux/Documentation/arch/x86/
H A Damd-memory-encryption.rst46 Bit[0] indicates support for SME
47 Bit[1] indicates support for SEV
60 Bit[23] 0 = memory encryption features are disabled
67 Bit[0] 0 = memory encryption is not active
151 Bit[4] indicates support for SEV-SNP
192 Bit[23] indicates support for segmented RMP
203 Bit[10] indicates if the number of cacheable RMP segments
209 Bit[0] indicates if segmented RMP is enabled

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