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/linux-5.10/Documentation/devicetree/bindings/spi/
Dicpdas-lp8841-spi-rtc.txt1 * ICP DAS LP-8841 SPI Controller for RTC
3 ICP DAS LP-8841 contains a DS-1302 RTC. RTC is connected to an IO
4 memory register, which acts as an SPI master device.
6 The device uses the standard MicroWire half-duplex transfer timing.
13 - #address-cells: should be 1
15 - #size-cells: should be 0
17 - compatible: should be "icpdas,lp8841-spi-rtc"
19 - reg: should provide IO memory address
21 Requirements to SPI slave nodes:
23 - There can be only one slave device.
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Dspi-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI Controller Generic Binding
10 - Mark Brown <broonie@kernel.org>
13 SPI busses can be described with a node for the SPI controller device
14 and a set of child nodes for each SPI slave on the bus. The system SPI
15 controller may be described for use in SPI master mode or in SPI slave mode,
20 pattern: "^spi(@.*|-[0-9a-f])*$"
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/linux-5.10/Documentation/devicetree/bindings/rtc/
Dmaxim-ds1302.txt1 * Maxim/Dallas Semiconductor DS-1302 RTC
5 The device uses the standard MicroWire half-duplex transfer timing.
12 - compatible : Should be "maxim,ds1302"
14 Required SPI properties:
16 - reg : Should be address of the device chip select within
19 - spi-max-frequency : DS-1302 has 500 kHz if powered at 2.2V,
22 - spi-3wire : The device has a shared signal IN/OUT line.
24 - spi-lsb-first : DS-1302 requires least significant bit first
27 - spi-cs-high: DS-1302 has active high chip select line. This is
32 spi@901c {
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/linux-5.10/drivers/iio/adc/
Dmax11100.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2016-17 Renesas Electronics Corporation
7 * Copyright (C) 2016-17 Jacopo Mondi
14 #include <linux/spi/spi.h>
20 * LSB is the ADC single digital step
21 * 1 LSB = (vref_mv / 2 ^ 16)
23 * LSB is used to calculate analog voltage value
26 * Ain = (count * LSB)
32 struct spi_device *spi; member
54 ret = spi_read(state->spi, state->buffer, sizeof(state->buffer)); in max11100_read_single()
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Dad7768-1.c1 // SPDX-License-Identifier: GPL-2.0
3 * Analog Devices AD7768-1 SPI ADC driver
17 #include <linux/spi/spi.h>
155 struct spi_device *spi; member
180 shift = 32 - (8 * len); in ad7768_spi_reg_read()
181 st->data.d8[0] = AD7768_RD_FLAG_MSK(addr); in ad7768_spi_reg_read()
183 ret = spi_write_then_read(st->spi, st->data.d8, 1, in ad7768_spi_reg_read()
184 &st->data.d32, len); in ad7768_spi_reg_read()
188 return (be32_to_cpu(st->data.d32) >> shift); in ad7768_spi_reg_read()
195 st->data.d8[0] = AD7768_WR_FLAG_MSK(addr); in ad7768_spi_reg_write()
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/linux-5.10/tools/spi/
Dspidev_fdx.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/spi/spidev.h>
42 status -= 2; in do_read()
44 while (status-- > 0) in do_read()
75 for (bp = buf; len; len--) in do_msg()
82 __u8 lsb, bits; in dumpstat() local
86 perror("SPI rd_mode"); in dumpstat()
89 if (ioctl(fd, SPI_IOC_RD_LSB_FIRST, &lsb) < 0) { in dumpstat()
90 perror("SPI rd_lsb_fist"); in dumpstat()
94 perror("SPI bits_per_word"); in dumpstat()
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Dspidev_test.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * SPI testing utility (using spidev driver)
8 * Cross-compile with cross-gcc -I/path/to/cross-kernel/include
24 #include <linux/spi/spidev.h>
71 while (length-- > 0) { in hex_dump()
91 * Unescape - process hexadecimal escape character
92 * converts shell input "\x23" -> 0x23
152 pabort("can't send spi message"); in transfer()
175 printf("Usage: %s [-DsbdlHOLC3vpNR24SI]\n", prog); in print_usage()
176 puts(" -D --device device to use (default /dev/spidev1.1)\n" in print_usage()
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/linux-5.10/drivers/spi/
Dspi-lp8841-rtc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * SPI master driver for ICP DAS LP-8841 RTC
11 * Copyright (C) 2003 - 2007 Paul Mundt
19 #include <linux/spi/spi.h>
30 * REVISIT If there is support for SPI_3WIRE and SPI_LSB_FIRST in SPI
31 * GPIO driver, this SPI driver can be replaced by a simple GPIO driver
44 data->state |= SPI_LP8841_RTC_CLK; in setsck()
46 data->state &= ~SPI_LP8841_RTC_CLK; in setsck()
47 writeb(data->state, data->iomem); in setsck()
54 data->state |= SPI_LP8841_RTC_MOSI; in setmosi()
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Dspi-fsl-spi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale SPI controller driver.
10 * CPM SPI and QE buffer descriptors mode support:
19 #include <linux/dma-mapping.h>
33 #include <linux/spi/spi.h>
34 #include <linux/spi/spi_bitbang.h>
45 #include "spi-fsl-lib.h"
46 #include "spi-fsl-cpm.h"
47 #include "spi-fsl-spi.h"
66 .compatible = "fsl,spi",
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Dspi-ppc4xx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * SPI_PPC4XX SPI controller driver.
9 * Based in part on drivers/spi/spi_s3c24xx.c
17 * The PPC4xx SPI controller has no FIFO so each sent/received byte will
20 * during SPI transfers by setting max_speed_hz via the device tree.
34 #include <linux/spi/spi.h>
35 #include <linux/spi/spi_bitbang.h>
39 #include <asm/dcr-regs.h>
41 /* bits in mode register - bit 0 is MSb */
54 * SPI_PPC4XX_MODE_RD = 0 means "MSB first" - this is the normal mode
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Dspi-pic32-sqi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * PIC32 Quad SPI controller driver.
10 #include <linux/dma-mapping.h>
18 #include <linux/spi/spi.h>
112 #define BD_DUAL BIT(22) /* Dual SPI */
113 #define BD_QUAD BIT(23) /* Quad SPI */
114 #define BD_LSBF BIT(25) /* LSB First */
117 #define BD_CS_DEASSERT BIT(30) /* de-assert CS after current BD */
121 * struct ring_desc - Representation of SQI ring descriptor
136 #define PESQI_BD_COUNT 256 /* max 64KB data per spi message */
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Dspi-fsl-espi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
18 #include <linux/spi/spi.h>
118 return ioread32be(espi->reg_base + offset); in fsl_espi_read_reg()
123 return ioread16be(espi->reg_base + offset); in fsl_espi_read_reg16()
128 return ioread8(espi->reg_base + offset); in fsl_espi_read_reg8()
134 iowrite32be(val, espi->reg_base + offset); in fsl_espi_write_reg()
140 iowrite16be(val, espi->reg_base + offset); in fsl_espi_write_reg16()
146 iowrite8(val, espi->reg_base + offset); in fsl_espi_write_reg8()
151 struct fsl_espi *espi = spi_master_get_devdata(m->spi->master); in fsl_espi_check_message()
152 struct spi_transfer *t, *first; in fsl_espi_check_message() local
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Dspi-orion.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Marvell Orion SPI controller driver
6 * Copyright (C) 2007-2008 Marvell Ltd.
14 #include <linux/spi/spi.h>
74 * have both is for managing the armada-370-spi case with old
105 return orion_spi->base + reg; in spi_reg()
130 static int orion_spi_baudrate_set(struct spi_device *spi, unsigned int speed) in orion_spi_baudrate_set() argument
139 orion_spi = spi_master_get_devdata(spi->master); in orion_spi_baudrate_set()
140 devdata = orion_spi->devdata; in orion_spi_baudrate_set()
142 tclk_hz = clk_get_rate(orion_spi->clk); in orion_spi_baudrate_set()
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Dspi-stm32.c1 // SPDX-License-Identifier: GPL-2.0
3 // STMicroelectronics STM32 SPI Controller driver (master mode only)
5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved
19 #include <linux/spi/spi.h>
23 /* STM32F4 SPI registers */
72 /* STM32F4 SPI Baud Rate min/max divisor */
76 /* STM32H7 SPI registers */
153 /* STM32H7 SPI Master Baud Rate min/max divisor */
157 /* STM32H7 SPI Communication mode */
163 /* SPI Communication type */
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/linux-5.10/Documentation/spi/
Dspidev.rst2 SPI userspace API
5 SPI devices have a limited userspace API, supporting basic half-duplex
6 read() and write() access to SPI slave devices. Using ioctl() requests,
15 #include <linux/spi/spidev.h>
19 * Prototyping in an environment that's not crash-prone; stray pointers
23 as SPI slaves, which you may need to change quite often.
35 Set up the other device characteristics (bits per word, SPI clocking,
42 When you do that, the sysfs node for the SPI device will include a child
45 busybox; it's less featureful, but often enough.) For a SPI device with
54 as usual, the SPI device node will
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Dspi-summary.rst2 Overview of Linux kernel SPI support
5 02-Feb-2012
7 What is SPI?
8 ------------
9 The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
12 standardization body. SPI uses a master/slave configuration.
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
22 SPI masters use a fourth "chip select" line to activate a given SPI slave
24 in parallel. All SPI slaves support chipselects; they are usually active
29 SPI slave functions are usually not interoperable between vendors
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/linux-5.10/drivers/crypto/caam/
Dpdb.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright 2008-2016 Freescale Semiconductor, Inc.
14 * PDB- IPSec ESP Header Modification Options
19 * Encap and Decap - Decrement TTL (Hop Limit) - Based on the value of the
27 * Decap - DiffServ Copy - Copy the IPv4 TOS or IPv6 Traffic Class byte
32 * Encap- Copy DF bit -if an IPv4 tunnel mode outer IP header is coming from
47 * PDB - IPSec ESP Encap/Decap Options
50 #define PDBOPTS_ESP_ARS32 0x40 /* 32-entry antireplay window */
51 #define PDBOPTS_ESP_ARS128 0x80 /* 128-entry antireplay window */
52 #define PDBOPTS_ESP_ARS64 0xc0 /* 64-entry antireplay window */
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/linux-5.10/drivers/fpga/
Daltera-ps-spi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Altera Passive Serial SPI Driver
9 * Manage Altera FPGA firmware that is loaded over SPI using the passive
18 #include <linux/fpga/fpga-mgr.h>
23 #include <linux/spi/spi.h>
43 struct spi_device *spi; member
82 { .compatible = "altr,fpga-passive-serial", .data = &c5_data },
83 { .compatible = "altr,fpga-arria10-passive-serial", .data = &a10_data },
90 struct altera_ps_conf *conf = mgr->priv; in altera_ps_state()
92 if (gpiod_get_value_cansleep(conf->status)) in altera_ps_state()
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/linux-5.10/drivers/char/tpm/
Dtpm_tis_spi_cr50.c1 // SPDX-License-Identifier: GPL-2.0
5 * This device driver implements a TCG PTP FIFO interface over SPI for chips
15 #include <linux/spi/spi.h>
23 * - can go to sleep not earlier than after CR50_SLEEP_DELAY_MSEC.
24 * - needs up to CR50_WAKE_START_DELAY_USEC to wake after sleep.
25 * - requires waiting for "ready" IRQ, if supported; or waiting for at least
27 * - waits for up to CR50_FLOW_CONTROL for flow control 'ready' indication.
66 cr50_phy->irq_confirmed = true; in cr50_spi_irq_handler()
67 complete(&cr50_phy->spi_phy.ready); in cr50_spi_irq_handler()
78 unsigned long allowed_access = phy->last_access + phy->access_delay; in cr50_ensure_access_delay()
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/linux-5.10/drivers/mtd/spi-nor/
Dcore.h1 /* SPDX-License-Identifier: GPL-2.0 */
48 /* Dual SPI */
54 /* Quad SPI */
60 /* Octal SPI */
72 /* Quad SPI */
77 /* Octal SPI */
86 * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type
92 * @opcode: the SPI command op code to erase the sector/block.
107 * struct spi_nor_erase_command - Used for non-uniform erases
110 * are run-length encoded.
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/linux-5.10/drivers/staging/iio/adc/
Dad7280a.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/spi/spi.h>
96 #define AD7280A_NUM_CH (AD7280A_AUX_ADC_6 - \
102 (c) - AD7280A_CELLS_PER_DEV)
106 /* 5-bit device address is sent LSB first */
131 struct spi_device *spi; member
162 unsigned char crc = ad7280_calc_crc8(st->crc_tab, val >> 10); in ad7280_check_crc()
165 return -EIO; in ad7280_check_crc()
180 if (st->readback_delay_us < 50) in ad7280_delay()
181 udelay(st->readback_delay_us); in ad7280_delay()
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/linux-5.10/include/linux/
Dregmap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
48 * struct reg_default - Default value for a register.
62 * struct reg_sequence - An individual write from a sequence of writes.
85 * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs
92 * tight-loops). Should be less than ~20ms since usleep_range
93 * is used (see Documentation/timers/timers-howto.rst).
96 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
112 * regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs
118 * @delay_us: Time to udelay between reads in us (0 tight-loops).
120 * (see Documentation/timers/timers-howto.rst).
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/linux-5.10/drivers/iio/imu/
Dadis16475.c1 // SPDX-License-Identifier: GPL-2.0
23 #include <linux/spi/spi.h>
63 /* spi max speed in brust mode */
125 struct adis16475 *st = file->private_data; in adis16475_show_firmware_revision()
131 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_REV, &rev); in adis16475_show_firmware_revision()
151 struct adis16475 *st = file->private_data; in adis16475_show_firmware_date()
157 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_Y, &year); in adis16475_show_firmware_date()
161 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_DM, &md); in adis16475_show_firmware_date()
165 len = snprintf(buf, sizeof(buf), "%.2x-%.2x-%.4x\n", md >> 8, md & 0xff, in adis16475_show_firmware_date()
184 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_SERIAL_NUM, &serial); in adis16475_show_serial_number()
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/linux-5.10/drivers/net/wireless/ti/wlcore/
Dspi.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2008-2009 Nokia Corporation
16 #include <linux/spi/spi.h>
52 ((WL1271_BUSY_WORD_LEN - 4) / sizeof(u32))
64 /* Maximum number of SPI write chunks */
70 .nvs_name = "ti-connectivity/wl127x-nvs.bin",
75 .nvs_name = "ti-connectivity/wl128x-nvs.bin",
80 .cfg_name = "ti-connectivity/wl18xx-conf.bin",
81 .nvs_name = "ti-connectivity/wl1271-nvs.bin",
92 struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent); in wl12xx_spi_reset()
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/linux-5.10/include/linux/fpga/
Dfpga-mgr.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2013-2016 Altera Corporation
18 * enum fpga_mgr_states - fpga framework states
59 * Flags used in the &fpga_image_info->flags field
67 * %FPGA_MGR_BITSTREAM_LSB_FIRST: SPI bitstream bit order is LSB first
78 * struct fpga_image_info - information specific to a FPGA image
109 * struct fpga_manager_ops - ops for low level fpga manager drivers
147 * struct fpga_compat_id - id for compatibility check
158 * struct fpga_manager - fpga manager structure

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