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/linux/tools/testing/selftests/net/mptcp/
H A Dmptcp_join.sh2 # SPDX-License-Identifier: GPL-2.0
46 declare -A all_tests
47 declare -a only_tests_ids
48 declare -a only_tests_names
49 declare -A failed_tests
103 ip netns exec $netns sysctl -q net.mptcp.pm_type=0 2>/dev/null || true
105 ip netns exec $netns sysctl -q net.mptcp.checksum_enabled=1
121 ip -net "$ns1" addr add 10.0.$i.1/24 dev ns1eth$i
122 ip -net "$ns1" addr add dead:beef:$i::1/64 dev ns1eth$i nodad
123 ip -net "$ns1" link set ns1eth$i up
[all …]
H A Dpm_netlink.sh2 # SPDX-License-Identifier: GPL-2.0
9 echo "Usage: $0 [ -i ] [ -h ]"
10 echo -e "\t-i: use 'ip mptcp' instead of 'pm_nl_ctl'"
11 echo -e "\t-h: help"
38 rm -f "${err}"
63 ip -n "${ns1}" mptcp limits
83 ip -n "${ns1}" mptcp endpoint change "${addr}" "${flags}"
128 if [ ${rc} -eq 2 ]; then
131 elif [ ${rc} -eq 0 ]; then
134 elif [ ${rc} -eq 1 ]; then
[all …]
/linux/drivers/counter/
H A D104-quad-8.c1 // SPDX-License-Identifier: GPL-2.0
3 * Counter driver for the ACCES 104-QUAD-8
6 * This driver supports the ACCES 104-QUAD-8 and ACCES 104-QUAD-4.
32 MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses");
37 MODULE_PARM_DESC(irq, "ACCES 104-QUAD-8 interrupt line numbers");
50 * struct quad8 - device private data structure
103 /* Reset and Load Signal Decoders */
113 * Reset and Load Signal Decoders
142 /* Non-recycle count */
144 /* Modulo-N */
[all …]
H A Drz-mtu3-cnt.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/mfd/rz-mtu3.h>
40 * 0: 16-bit, 1: 32-bit
66 * struct rz_mtu3_cnt - MTU3 counter private data
72 * @mtu_16bit_max: Cache for 16-bit counters
73 * @mtu_32bit_max: Cache for 32-bit counters
92 static inline size_t rz_mtu3_get_hw_ch(const size_t id) in rz_mtu3_get_hw_ch() argument
94 return (id == RZ_MTU3_32_BIT_CH) ? 0 : id; in rz_mtu3_get_hw_ch()
97 static inline struct rz_mtu3_channel *rz_mtu3_get_ch(struct counter_device *counter, int id) in rz_mtu3_get_ch() argument
100 const size_t ch_id = rz_mtu3_get_hw_ch(id); in rz_mtu3_get_ch()
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H A Dstm32-lptimer-cnt.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer Encoder and Counter driver
9 * Inspired by 104-quad-8 and stm32-timer-trigger drivers.
15 #include <linux/mfd/stm32-lptimer.h>
37 ret = regmap_read(priv->regmap, STM32_LPTIM_CR, &val); in stm32_lptim_is_enabled()
51 ret = regmap_write(priv->regmap, STM32_LPTIM_CR, val); in stm32_lptim_set_enable_state()
56 clk_disable(priv->clk); in stm32_lptim_set_enable_state()
57 priv->enabled = false; in stm32_lptim_set_enable_state()
61 ret = clk_enable(priv->clk); in stm32_lptim_set_enable_state()
66 ret = regmap_write(priv->regmap, STM32_LPTIM_ARR, priv->ceiling); in stm32_lptim_set_enable_state()
[all …]
H A Dcounter-sysfs.c1 // SPDX-License-Identifier: GPL-2.0
20 #include "counter-sysfs.h"
28 * struct counter_attribute - Counter sysfs attribute
48 * struct counter_attribute_group - container for attribute group
62 [COUNTER_FUNCTION_PULSE_DIRECTION] = "pulse-direction",
90 [COUNTER_COUNT_MODE_NON_RECYCLE] = "non-recycle",
91 [COUNTER_COUNT_MODE_MODULO_N] = "modulo-n",
93 [COUNTER_COUNT_MODE_HARDWARE_RETRIGGERABLE_ONESHOT] = "hardware retriggerable one-shot",
113 switch (a->scope) { in counter_comp_u8_show()
115 err = a->comp.device_u8_read(counter, &data); in counter_comp_u8_show()
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H A Dstm32-timer-cnt.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/mfd/stm32-timers.h>
65 regmap_read(priv->regmap, TIM_CNT, &cnt); in stm32_count_read()
77 regmap_read(priv->regmap, TIM_ARR, &ceiling); in stm32_count_write()
79 return -EINVAL; in stm32_count_write()
81 return regmap_write(priv->regmap, TIM_CNT, val); in stm32_count_write()
91 regmap_read(priv->regmap, TIM_SMCR, &smcr); in stm32_count_function_read()
107 return -EINVAL; in stm32_count_function_read()
123 if (!priv->has_encoder) in stm32_count_function_write()
124 return -EOPNOTSUPP; in stm32_count_function_write()
[all …]
/linux/tools/testing/selftests/timers/
H A Dposix_timers.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <signal.h>
88 diff = end.tv_usec - start.tv_usec; in check_diff()
89 diff += (end.tv_sec - start.tv_sec) * USEC_PER_SEC; in check_diff()
91 if (llabs(diff - DELAY * USEC_PER_SEC) > USEC_PER_SEC / 2) { in check_diff()
93 return -1; in check_diff()
109 signal(SIGVTALRM, sig_handler); in check_itimer()
111 signal(SIGPROF, sig_handler); in check_itimer()
113 signal(SIGALRM, sig_handler); in check_itimer()
140 timer_t id; in check_timer_create() local
[all …]
/linux/Documentation/devicetree/bindings/mailbox/
H A Dqcom-ipcc.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mailbox/qcom-ipcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. Inter-Processor Communication Controller
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
13 The Inter-Processor Communication Controller (IPCC) is a centralized hardware
14 to route interrupts across various subsystems. It involves a three-level
15 addressing scheme called protocol, client and signal. For example, consider an
18 a case, the client would be Modem (client-id is 2) and the signal would be
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/linux/Documentation/netlink/specs/
H A Ddpll.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
2 ---
8 -
16 -
20 -
23 render-max: true
24 -
26 name: lock-status
31 -
37 -
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/linux/include/linux/
H A Dposix-timers.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 #include <linux/posix-timers_types.h>
40 static inline bool clockid_aux_valid(clockid_t id) in clockid_aux_valid() argument
42 return IS_ENABLED(CONFIG_POSIX_AUX_CLOCKS) && id >= CLOCK_AUX && id <= CLOCK_AUX_LAST; in clockid_aux_valid()
50 * cpu_timer - Posix CPU timer representation for k_itimer
56 * @nanosleep: Timer is used for nanosleep and is not a regular posix-timer
72 ctmr->head = head; in cpu_timer_enqueue()
73 return timerqueue_add(head, &ctmr->node); in cpu_timer_enqueue()
78 return !!ctmr->head; in cpu_timer_queued()
84 timerqueue_del(ctmr->head, &ctmr->node); in cpu_timer_dequeue()
[all …]
H A Dcounter.h1 /* SPDX-License-Identifier: GPL-2.0 */
40 * struct counter_comp - Counter component node
42 * @name: device-specific component name
43 * @priv: component-relevant data
53 * @signal_u8_read: Signal u8 component read callback. The read value of the
54 * respective Signal u8 component should be passed back via
62 * @signal_u32_read: Signal u32 component read callback. The read value of
63 * the respective Signal u32 component should be passed
71 * @signal_u64_read: Signal u64 component read callback. The read value of
72 * the respective Signal u64 component should be passed
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/linux/drivers/dpll/zl3073x/
H A Dcore.h1 /* SPDX-License-Identifier: GPL-2.0-only */
30 * struct zl3073x_ref - input reference invariant info
42 * struct zl3073x_out - output invariant info
45 * @signal_format: out signal format
54 * struct zl3073x_synth - synthesizer invariant info
56 * @dpll: ID of DPLL the synthesizer is driven by
66 * struct zl3073x_dev - zl3073x device
70 * @clock_id: clock id of the device
138 zl3073x_is_n_pin(u8 id) in zl3073x_is_n_pin() argument
140 /* P-pins ids are even while N-pins are odd */ in zl3073x_is_n_pin()
[all …]
/linux/Documentation/driver-api/
H A Dgeneric-counter.rst1 .. SPDX-License-Identifier: GPL-2.0
29 * Signal:
33 Association of a Signal, and evaluation trigger, with a Count.
38 SIGNAL section in Theory
39 ------
40 A Signal represents a stream of data. This is the input data that is
42 signal output line of a rotary encoder. Not all counter devices provide
43 user access to the Signal data, so exposure is optional for drivers.
45 When the Signal data is available for user access, the Generic Counter
46 interface provides the following available signal values:
[all …]
/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_detection.c55 link->ctx->logger
71 static const u8 dp_hdmi_dongle_signature_str[] = "DP-HDMI ADAPTOR";
110 switch (downstream.id) { in get_basic_signal_type()
112 switch (encoder.id) { in get_basic_signal_type()
124 switch (encoder.id) { in get_basic_signal_type()
154 switch (downstream.id) { in get_basic_signal_type()
176 if (link->is_dig_mapping_flexible) in link_detect_sink_signal_type()
177 enc_id = (struct graphics_object_id){.id = ENCODER_ID_UNKNOWN}; in link_detect_sink_signal_type()
179 enc_id = link->link_enc->id; in link_detect_sink_signal_type()
180 result = get_basic_signal_type(enc_id, link->link_id); in link_detect_sink_signal_type()
[all …]
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_events.h1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
3 * Copyright 2014-2022 Advanced Micro Devices, Inc.
36 * IDR supports non-negative integer IDs. Small IDs are used for
37 * signal events to match their signal slot. Use the upper half of the
38 * ID space for non-signal events.
45 * Since the event protocol may need to write the event ID into memory, this
46 * must not be a valid event ID.
47 * For the sake of easy memset-ing, this must be a byte pattern.
49 #define UNSIGNALED_EVENT_SLOT ((uint64_t)-1)
66 /* Only for signal events. */
/linux/Documentation/firmware-guide/acpi/
H A Dchromeos-acpi-device.rst1 .. SPDX-License-Identifier: GPL-2.0
8 The plug and play ID of a Chrome OS ACPI device is GGL0001 and the hardware ID is
11 .. flat-table:: Supported ACPI Objects
13 :header-rows: 1
15 * - Object
16 - Description
18 * - CHSW
19 - Chrome OS switch positions
21 * - HWID
22 - Chrome OS hardware ID
[all …]
/linux/drivers/staging/media/atomisp/pci/
H A Dinput_system_ctrl_defs.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 /* --------------------------------------------------*/
14 /* --------------------------------------------------*/
16 /* --------------------------------------------------*/
21 // Register id's of MMIO slave accessible registers
60 …MAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-r…
61 …MAND_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-r…
62 …NOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-r…
63 …NOWLEDGE_REG_RSTVAL 15 //0x0000_000F (to signal non-valid cmd/ack after reset/soft-r…
98 /* --------------------------------------------------*/
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/linux/Documentation/admin-guide/media/
H A Dmgb4.rst1 .. SPDX-License-Identifier: GPL-2.0
8 Copyright |copy| 2023 - 2025 Digiteq Automotive
12 card capable of capturing and generating FPD-Link III and GMSL2/3 video streams
16 ---------------
22 There are two types of parameters - global / PCI card related, found under
32 | 0 - No module present
33 | 1 - FPDL3
34 | 2 - GMSL (one serializer, two daisy chained deserializers)
35 | 3 - GMSL (one serializer, two deserializers)
36 | 4 - GMSL (two deserializers with two daisy chain outputs)
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/linux/Documentation/devicetree/bindings/mmc/
H A Darm,pl18x.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/arm,pl18x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Ulf Hansson <ulf.hansson@linaro.org>
20 - $ref: /schemas/arm/primecell.yaml#
21 - $ref: mmc-controller.yaml#
29 - arm,pl180
30 - arm,pl181
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/linux/drivers/gpu/drm/etnaviv/
H A Detnaviv_perfmon.c1 // SPDX-License-Identifier: GPL-2.0
20 const struct etnaviv_pm_signal *signal);
31 const struct etnaviv_pm_signal *signal; member
42 const struct etnaviv_pm_signal *signal) in perf_reg_read() argument
44 gpu_write(gpu, domain->profile_config, signal->data); in perf_reg_read()
46 return gpu_read(gpu, domain->profile_read); in perf_reg_read()
59 const struct etnaviv_pm_signal *signal) in pipe_perf_reg_read() argument
65 lockdep_assert_held(&gpu->lock); in pipe_perf_reg_read()
67 for (i = 0; i < gpu->identity.pixel_pipes; i++) { in pipe_perf_reg_read()
69 value += perf_reg_read(gpu, domain, signal); in pipe_perf_reg_read()
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/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_link_encoder.h2 * Copyright 2012-15 Advanced Micro Devices, Inc.
39 #define AUX_REG_LIST(id)\ argument
40 SRI(AUX_CONTROL, DP_AUX, id), \
41 SRI(AUX_DPHY_RX_CONTROL0, DP_AUX, id), \
42 SRI(AUX_DPHY_RX_CONTROL1, DP_AUX, id)
44 #define HPD_REG_LIST(id)\ argument
45 SRI(DC_HPD_CONTROL, HPD, id)
47 #define LE_COMMON_REG_LIST_BASE(id) \ argument
52 SRI(DIG_BE_CNTL, DIG, id), \
53 SRI(DIG_BE_EN_CNTL, DIG, id), \
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/linux/sound/core/
H A Dmisc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
28 * snd_pci_quirk_lookup_id - look up a PCI SSID quirk list
29 * @vendor: PCI SSV id
30 * @device: PCI SSD id
45 for (q = list; q->subvendor || q->subdevice; q++) { in snd_pci_quirk_lookup_id()
46 if (q->subvendor != vendor) in snd_pci_quirk_lookup_id()
48 if (!q->subdevice || in snd_pci_quirk_lookup_id()
49 (device & q->subdevice_mask) == q->subdevice) in snd_pci_quirk_lookup_id()
57 * snd_pci_quirk_lookup - look up a PCI SSID quirk list
72 return snd_pci_quirk_lookup_id(pci->subsystem_vendor, in snd_pci_quirk_lookup()
[all …]
/linux/include/uapi/linux/
H A Dcounter.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
30 * struct counter_component - Counter component identification
33 * @parent: parent ID (matching the ID suffix of the respective parent sysfs
35 * Documentation/ABI/testing/sysfs-bus-counter)
36 * @id: component ID (matching the ID provided by the respective *_component_id
41 * COUNTER_SCOPE_COUNT, parent equal to 2, and id equal to the value provided by
49 __u8 id; member
62 /* Index signal detected */
73 * struct counter_watch - Counter component watch configuration
107 * struct counter_event - Counter event data
[all …]
/linux/drivers/parisc/
H A Diosapic_private.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Copyright (C) 2000,2003 Grant Grundler (grundler at parisc-linux.org)
7 * Copyright (C) 2002 Matthew Wilcox (willy at parisc-linux.org)
15 ** they pack nicely for 64-bit compilation. (ie sizeof(long) == 8)
21 ** -----------------------
24 ** table per cell. N- and L-class consist of a single cell.
49 ** 01 = Edge-triggered
51 ** 11 = Level-triggered
57 ** irq identifies PCI interrupt signal where
66 /* Source Bus ID identifies the bus where interrupt signal comes from */
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