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/linux-5.10/Documentation/devicetree/bindings/mmc/
Dsdhci-st.txt1 * STMicroelectronics sdhci-st MMC/SD controller
5 used by the sdhci-st driver.
8 - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407"
13 - clock-names: Should be "mmc" and "icn". (NB: The latter is not compulsory)
14 See: Documentation/devicetree/bindings/resource-names.txt
15 - clocks: Phandle to the clock.
16 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
18 - interrupts: One mmc interrupt should be described here.
19 - interrupt-names: Should be "mmcirq".
21 - pinctrl-names: A pinctrl state names "default" must be defined.
[all …]
Dcdns,sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence SD/SDIO/eMMC Host Controller (SD4HC)
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
11 - Piotr Sroka <piotrs@cadence.com>
14 - $ref: mmc-controller.yaml
19 - enum:
20 - socionext,uniphier-sd4hc
21 - const: cdns,sd4hc
[all …]
Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
42 cd-gpios:
46 non-removable:
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Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/mmc/sdhci-am654.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: mmc-controller.yaml#
19 - ti,am654-sdhci-5.1
20 - ti,j721e-sdhci-8bit
21 - ti,j721e-sdhci-4bit
[all …]
Dbrcm,sdhci-brcmstb.txt4 and the properties used by the sdhci-brcmstb driver.
6 NOTE: The driver disables all UHS speed modes by default and depends
11 - compatible: should be one of the following
12 - "brcm,bcm7425-sdhci"
13 - "brcm,bcm7445-sdhci"
14 - "brcm,bcm7216-sdhci"
16 Refer to clocks/clock-bindings.txt for generic clock consumer properties.
21 sd-uhs-sdr50;
22 sd-uhs-ddr50;
23 sd-uhs-sdr104;
[all …]
/linux-5.10/arch/arm/boot/dts/
Dstih410-b2120.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include "stihxxx-b2120.dtsi"
11 compatible = "st,stih410-b2120", "st,stih410";
15 stdout-path = &sbc_serial0;
31 max-frequency = <200000000>;
32 sd-uhs-sdr50;
33 sd-uhs-sdr104;
34 sd-uhs-ddr50;
61 sti-display-subsystem@0 {
[all …]
Dstih418-b2199.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
11 compatible = "st,stih418-b2199", "st,stih418";
15 stdout-path = &sbc_serial0;
29 compatible = "gpio-leds";
33 linux,default-trigger = "heartbeat";
37 default-state = "off";
70 clock-frequency = <100000>;
71 st,i2c-min-scl-pulse-width-us = <0>;
[all …]
Drk3288-firefly-reload.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include "rk3288-firefly-reload-core.dtsi"
11 model = "Firefly-RK3288-reload";
12 compatible = "firefly,firefly-rk3288-reload", "rockchip,rk3288";
14 adc-keys {
15 compatible = "adc-keys";
16 io-channels = <&saradc 1>;
17 io-channel-names = "buttons";
18 keyup-threshold-microvolt = <1800000>;
[all …]
Dstm32mp157c-ed1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 /dts-v1/;
10 #include "stm32mp15-pinctrl.dtsi"
11 #include "stm32mp15xxaa-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/mfd/st,stpmic1.h>
17 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
20 stdout-path = "serial0:115200n8";
28 reserved-memory {
[all …]
Dexynos5420-arndale-octa.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "exynos5420-cpus.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/clock/samsung,s2mps11.h>
19 compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5";
27 stdout-path = "serial3:115200n8";
31 compatible = "samsung,secure-firmware";
[all …]
Dexynos5422-odroid-core.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4/HC1 boards core device tree source
6 * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd.
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
14 #include "exynos5422-cpus.dtsi"
23 stdout-path = "serial2:115200n8";
27 compatible = "samsung,secure-firmware";
31 fixed-rate-clocks {
[all …]
Dqcom-ipq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
6 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <1>;
[all …]
/linux-5.10/drivers/mmc/core/
Ddebugfs.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/fault-inject.h>
54 struct mmc_host *host = s->private; in mmc_ios_show()
55 struct mmc_ios *ios = &host->ios; in mmc_ios_show()
58 seq_printf(s, "clock:\t\t%u Hz\n", ios->clock); in mmc_ios_show()
59 if (host->actual_clock) in mmc_ios_show()
60 seq_printf(s, "actual clock:\t%u Hz\n", host->actual_clock); in mmc_ios_show()
61 seq_printf(s, "vdd:\t\t%u ", ios->vdd); in mmc_ios_show()
62 if ((1 << ios->vdd) & MMC_VDD_165_195) in mmc_ios_show()
63 seq_printf(s, "(1.65 - 1.95 V)\n"); in mmc_ios_show()
[all …]
Dhost.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2007-2008 Pierre Ossman
25 #include <linux/mmc/slot-gpio.h>
29 #include "slot-gpio.h"
40 wakeup_source_unregister(host->ws); in mmc_host_classdev_release()
41 ida_simple_remove(&mmc_host_ida, host->index); in mmc_host_classdev_release()
62 host->can_retune = 1; in mmc_retune_enable()
63 if (host->retune_period) in mmc_retune_enable()
64 mod_timer(&host->retune_timer, in mmc_retune_enable()
65 jiffies + host->retune_period * HZ); in mmc_retune_enable()
[all …]
Dsd.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/mmc/core/sd.c
5 * Copyright (C) 2003-2004 Russell King, All Rights Reserved.
6 * SD support Copyright (C) 2004 Ian Molton, All Rights Reserved.
7 * Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved.
19 #include <linux/mmc/sd.h>
26 #include "sd.h"
58 const u32 __mask = (__size < 32 ? 1 << __size : 0) - 1; \
59 const int __off = 3 - ((start) / 32); \
65 __res |= resp[__off-1] << ((32 - __shft) % 32); \
[all …]
/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-gxl-s905x-libretech-cc-v2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/sound/meson-aiu.h>
13 #include "meson-gxl-s905x.dtsi"
16 compatible = "libretech,aml-s905x-cc-v2", "amlogic,s905x",
17 "amlogic,meson-gxl";
18 model = "Libre Computer AML-S905X-CC V2";
27 stdout-path = "serial0:115200n8";
[all …]
Dmeson-gxbb-nanopi-k2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxbb.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
12 compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
21 stdout-path = "serial0:115200n8";
30 compatible = "gpio-leds";
32 led-stat {
33 label = "nanopi-k2:blue:stat";
35 default-state = "on";
[all …]
Dmeson-gx-libretech-pc.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 /* Libretech Amlogic GX PC form factor - AKA: Tartiflette */
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/sound/meson-aiu.h>
14 adc-keys {
15 compatible = "adc-keys";
16 io-channels = <&saradc 0>;
17 io-channel-names = "buttons";
18 keyup-threshold-microvolt = <1800000>;
[all …]
Dmeson-gxbb-odroidc2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-gxbb.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
14 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
15 model = "Hardkernel ODROID-C2";
23 stdout-path = "serial0:115200n8";
31 usb_otg_pwr: regulator-usb-pwrs {
32 compatible = "regulator-fixed";
34 regulator-name = "USB_OTG_PWR";
[all …]
/linux-5.10/drivers/mmc/host/
Dsdhci-cadence.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include "sdhci-pltfm.h"
18 /* HRS - Host Register Set (specific to Cadence) */
38 /* SRS - Slot Register Set (SDHCI-compatible) */
56 * The tuned val register is 6 bit-wide, but not the whole of the range is
57 * available. The range 0-42 seems to be available (then 43 wraps around to 0)
80 { "cdns,phy-input-delay-sd-highspeed", SDHCI_CDNS_PHY_DLY_SD_HS, },
81 { "cdns,phy-input-delay-legacy", SDHCI_CDNS_PHY_DLY_SD_DEFAULT, },
82 { "cdns,phy-input-delay-sd-uhs-sdr12", SDHCI_CDNS_PHY_DLY_UHS_SDR12, },
83 { "cdns,phy-input-delay-sd-uhs-sdr25", SDHCI_CDNS_PHY_DLY_UHS_SDR25, },
[all …]
Dsdhci-of-arasan.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
9 * Based on sdhci-of-esdhc.c
18 #include <linux/clk-provider.h>
25 #include <linux/firmware/xlnx-zynqmp.h>
28 #include "sdhci-pltfm.h"
55 * On some SoCs the syscon area has a feature where the upper 16-bits of
56 * each 32-bit register act as a write mask for the lower 16-bits. This allows
64 * struct sdhci_arasan_soc_ctl_field - Field used in sdhci_arasan_soc_ctl_map
68 * @shift: Bit offset within @reg of this field (or -1 if not avail)
[all …]
Dsdhci-esdhc-imx.c1 // SPDX-License-Identifier: GPL-2.0
5 * derived from the OF-version.
23 #include <linux/mmc/slot-gpio.h>
27 #include <linux/platform_data/mmc-esdhc-imx.h>
29 #include "sdhci-pltfm.h"
30 #include "sdhci-esdhc.h"
82 #define ESDHC_TUNE_CTRL_MAX ((1 << 7) - 1)
133 * open ended multi-blk IO. Otherwise the TC INT wouldn't
167 * uSDHC: Due to the I/O timing limit, for SDR mode, SD card clock can't
168 * exceed 150MHz, for DDR mode, SD card clock can't exceed 45MHz.
[all …]
/linux-5.10/arch/arm64/boot/dts/zte/
Dzx296718.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/input/input.h>
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/gpio/gpio.h>
47 #include <dt-bindings/clock/zx296718-clock.h>
51 #address-cells = <1>;
52 #size-cells = <1>;
53 interrupt-parent = <&gic>;
67 #address-cells = <2>;
68 #size-cells = <0>;
[all …]
/linux-5.10/include/linux/mmc/
Dhost.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #include <linux/fault-inject.h>
17 #include <linux/dma-direction.h>
108 * ios->clock might be 0. For some controllers, setting 0Hz
118 * 1 for a read-only card
119 * -ENOSYS when not supported (equal to NULL callback)
128 * -ENOSYS when not supported (equal to NULL callback)
145 /* The tuning command opcode value is different for SD and eMMC cards */
181 /* Free resources, and make the CQE non-operational */
185 * effect of ->cqe_off().
[all …]
/linux-5.10/arch/powerpc/boot/dts/
Dfsp2.dts12 /dts-v1/;
15 #address-cells = <2>;
16 #size-cells = <1>;
19 dcr-parent = <&{/cpus/cpu@0}>;
28 #address-cells = <1>;
29 #size-cells = <0>;
35 clock-frequency = <0>; /* Filled in by cuboot */
36 timebase-frequency = <0>; /* Filled in by cuboot */
37 i-cache-line-size = <32>;
38 d-cache-line-size = <32>;
[all …]

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