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/linux-6.8/Documentation/devicetree/bindings/net/
Dfsl,fec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Wei Fang <wei.fang@nxp.com>
12 - NXP Linux Team <linux-imx@nxp.com>
15 - $ref: ethernet-controller.yaml#
20 - enum:
21 - fsl,imx25-fec
22 - fsl,imx27-fec
[all …]
Dhisilicon-femac.txt4 - compatible: should contain one of the following version strings:
5 * "hisilicon,hisi-femac-v1"
6 * "hisilicon,hisi-femac-v2"
7 and the soc string "hisilicon,hi3516cv300-femac".
8 - reg: specifies base physical address(s) and size of the device registers.
11 - interrupts: should contain the MAC interrupt.
12 - clocks: A phandle to the MAC main clock.
13 - resets: should contain the phandle to the MAC reset signal(required) and
14 the PHY reset signal(optional).
15 - reset-names: should contain the reset signal name "mac"(required)
[all …]
Dmdio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
17 bus. These should follow the generic ethernet-phy.yaml document, or
24 "#address-cells":
27 "#size-cells":
30 reset-gpios:
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Dhisilicon-hix5hd2-gmac.txt4 - compatible: should contain one of the following SoC strings:
5 * "hisilicon,hix5hd2-gmac"
6 * "hisilicon,hi3798cv200-gmac"
7 * "hisilicon,hi3516a-gmac"
9 * "hisilicon,hisi-gmac-v1"
10 * "hisilicon,hisi-gmac-v2"
13 - reg: specifies base physical address(s) and size of the device registers.
16 - interrupts: should contain the MAC interrupt.
17 - #address-cells: must be <1>.
18 - #size-cells: must be <0>.
[all …]
/linux-6.8/arch/arm/boot/dts/nxp/imx/
Dmba6ulx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2018-2022 TQ-Systems GmbH
4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
8 model = "TQ-Systems MBA6ULx Baseboard";
18 stdout-path = &uart1;
22 compatible = "pwm-backlight";
23 power-supply = <&reg_mba6ul_3v3>;
24 enable-gpios = <&expander_out0 4 GPIO_ACTIVE_HIGH>;
29 compatible = "gpio-beeper";
33 gpio_buttons: gpio-keys {
[all …]
Dimx6qdl-apf6.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
9 reg_1p8v: regulator-1p8v {
10 compatible = "regulator-fixed";
11 regulator-name = "1P8V";
12 regulator-min-microvolt = <1800000>;
13 regulator-max-microvolt = <1800000>;
14 regulator-always-on;
15 vin-supply = <&reg_3p3v>;
[all …]
Dimx7d-flex-concentrator.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "imx7d-tqma7.dtsi"
14 /delete-node/ &ds1339;
18 compatible = "kam,imx7d-flex-concentrator", "fsl,imx7d";
22 /* 1024 MB - TQMa7D board configuration */
26 reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
27 compatible = "regulator-fixed";
28 regulator-name = "VBUS_USBOTG2";
29 regulator-min-microvolt = <5000000>;
[all …]
/linux-6.8/arch/arm64/boot/dts/allwinner/
Dsun50i-h5-nanopi-neo-plus2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 /dts-v1/;
6 #include "sun50i-h5.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/pinctrl/sun4i-a10.h>
14 compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
22 stdout-path = "serial0:115200n8";
26 compatible = "gpio-leds";
28 led-0 {
[all …]
Dsun50i-h5-nanopi-r1s-h5.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Based on sun50i-h5-nanopi-neo-plus2.dts, which is:
10 /dts-v1/;
11 #include "sun50i-h5.dtsi"
12 #include "sun50i-h5-cpu-opp.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/leds/common.h>
20 compatible = "friendlyarm,nanopi-r1s-h5", "allwinner,sun50i-h5";
29 stdout-path = "serial0:115200n8";
[all …]
Dsun50i-h6-pine-h64-model-b.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "sun50i-h6-pine-h64.dts"
10 compatible = "pine64,pine-h64-model-b", "allwinner,sun50i-h6";
12 /delete-node/ reg_gmac_3v3;
15 compatible = "mmc-pwrseq-simple";
16 reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
17 post-power-on-delay-ms = <200>;
22 /delete-property/ ddc-en-gpios;
26 phy-supply = <&reg_aldo2>;
30 vmmc-supply = <&reg_cldo3>;
[all …]
/linux-6.8/arch/arm64/boot/dts/ti/
Dk3-j7200-evm-quad-port-eth-exp.dtso1 // SPDX-License-Identifier: GPL-2.0
3 * DT Overlay for CPSW5G in QSGMII mode using J7 Quad Port ETH EXP Add-On Ethernet Card with
6 * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
9 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
14 #include "k3-pinctrl.h"
15 #include "k3-serdes.h"
19 ethernet1 = "/bus@100000/ethernet@c000000/ethernet-ports/port@1";
20 ethernet2 = "/bus@100000/ethernet@c000000/ethernet-ports/port@2";
21 ethernet3 = "/bus@100000/ethernet@c000000/ethernet-ports/port@3";
[all …]
Dk3-j721e-evm-quad-port-eth-exp.dtso1 // SPDX-License-Identifier: GPL-2.0
3 * DT Overlay for CPSW9G in QSGMII mode using J7 Quad Port ETH EXP Add-On Ethernet Card with
6 * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
9 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/phy/phy-cadence.h>
16 #include "k3-pinctrl.h"
17 #include "k3-serdes.h"
21 ethernet1 = "/bus@100000/ethernet@c000000/ethernet-ports/port@1";
[all …]
/linux-6.8/arch/arm/boot/dts/st/
Dstm32mp15xx-dhcor-testbench.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
17 stdout-path = "serial0:115200n8";
20 sd_switch: regulator-sd_switch {
21 compatible = "regulator-gpio";
22 regulator-name = "sd_switch";
23 regulator-min-microvolt = <1800000>;
24 regulator-max-microvolt = <2900000>;
25 regulator-type = "voltage";
26 regulator-always-on;
29 gpios-states = <0>;
[all …]
Dstm32mp15xx-dhcor-drc-compact.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
21 stdout-path = "serial0:115200n8";
25 compatible = "gpio-leds";
29 default-state = "off";
35 default-state = "off";
40 compatible = "regulator-fixed";
41 regulator-name = "vio";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
45 regulator-always-on;
[all …]
/linux-6.8/arch/mips/boot/dts/ingenic/
Dcu1000-neo.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/clock/ingenic,sysost.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "yna,cu1000-neo", "ingenic,x1000e";
11 model = "YSH & ATIL General Board CU1000-Neo";
18 stdout-path = "serial2:115200n8";
27 compatible = "gpio-leds";
28 led-0 {
[all …]
Dcu1830-neo.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/clock/ingenic,sysost.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "yna,cu1830-neo", "ingenic,x1830";
11 model = "YSH & ATIL General Board CU1830-Neo";
18 stdout-path = "serial1:115200n8";
27 compatible = "gpio-leds";
28 led-0 {
[all …]
/linux-6.8/arch/arm64/boot/dts/renesas/
Dbeacon-renesom-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/clock/versaclock.h>
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <32768>;
20 clock-output-names = "osc_32k";
23 reg_1p8v: regulator-1p8v {
24 compatible = "regulator-fixed";
25 regulator-name = "fixed-1.8V";
[all …]
/linux-6.8/arch/arm64/boot/dts/rockchip/
Dpx30-engicam-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
15 vcc5v0_sys: vcc5v0-sys {
16 compatible = "regulator-fixed";
17 regulator-name = "vcc5v0_sys"; /* +5V */
18 regulator-always-on;
19 regulator-boot-on;
20 regulator-min-microvolt = <5000000>;
21 regulator-max-microvolt = <5000000>;
24 sdio_pwrseq: sdio-pwrseq {
25 compatible = "mmc-pwrseq-simple";
[all …]
/linux-6.8/arch/arm/boot/dts/actions/
Dowl-s500-roseapplepi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright (C) 2020-2021 Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
8 /dts-v1/;
10 #include "owl-s500.dtsi"
22 stdout-path = "serial2:115200n8";
30 syspwr: regulator-5v0 {
31 compatible = "regulator-fixed";
32 regulator-name = "SYSPWR";
33 regulator-min-microvolt = <5000000>;
34 regulator-max-microvolt = <5000000>;
[all …]
/linux-6.8/drivers/gpu/drm/msm/dsi/phy/
Ddsi_phy_14nm.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
8 #include <linux/delay.h>
17 * DSI PLL 14nm - clock diagram (eg: DSI0):
22 * +----+ | +----+
23 * dsi0vco_clk ---| n1 |--o--| /8 |-- dsi0pllbyte
24 * +----+ | +----+
26 * | +----+ |
27 * o---| /2 |--o--|\
28 * | +----+ | \ +----+
[all …]
/linux-6.8/arch/arm/boot/dts/allwinner/
Dsun8i-s3-pinecube.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
6 /dts-v1/;
7 #include "sun8i-v3.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 compatible = "pine64,pinecube", "sochip,s3", "allwinner,sun8i-v3";
20 stdout-path = "serial0:115200n8";
24 compatible = "gpio-leds";
38 compatible = "regulator-fixed";
39 regulator-name = "vcc5v0";
[all …]
/linux-6.8/arch/arm64/boot/dts/freescale/
Dimx8mn-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include "imx8mn-overdrive.dtsi"
16 compatible = "mmc-pwrseq-simple";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
19 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
21 clock-names = "ext_clock";
22 post-power-on-delay-ms = <80>;
32 cpu-supply = <&buck2_reg>;
36 cpu-supply = <&buck2_reg>;
[all …]
Dimx8mm-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include "imx8mm-overdrive.dtsi"
15 compatible = "mmc-pwrseq-simple";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
18 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
20 clock-names = "ext_clock";
21 post-power-on-delay-ms = <80>;
31 cpu-supply = <&buck2_reg>;
35 cpu-supply = <&buck2_reg>;
[all …]
/linux-6.8/drivers/mmc/host/
Dsdhci-of-dwcmshc.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/dma-mapping.h>
20 #include <linux/reset.h>
23 #include "sdhci-pltfm.h"
39 /* Tuning and auto-tuning fields in AT_CTRL_R control register */
49 #define AT_CTRL_PRE_CHANGE_DLY 0x1 /* 2-cycle latency */
51 #define AT_CTRL_POST_CHANGE_DLY 0x3 /* 4-cycle latency */
91 /* PHY register area pointer */
94 /* PHY general configuration */
96 #define PHY_CNFG_RSTN_DEASSERT 0x1 /* Deassert PHY reset */
[all …]
/linux-6.8/drivers/net/mdio/
Dof_mdio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OF helpers for the MDIO (Ethernet PHY) API
7 * This file provides helper functions for extracting PHY device information
21 #include <linux/phy.h>
28 MODULE_DESCRIPTION("OpenFirmware MDIO bus (Ethernet PHY) accessors");
30 /* Extract the clause 22 phy ID from the compatible string of the form
31 * ethernet-phy-idAAAA.BBBB */
37 int of_mdiobus_phy_device_register(struct mii_bus *mdio, struct phy_device *phy, in of_mdiobus_phy_device_register() argument
40 return fwnode_mdiobus_phy_device_register(mdio, phy, in of_mdiobus_phy_device_register()
67 device_set_node(&mdiodev->dev, fwnode); in of_mdiobus_register_device()
[all …]

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