| /linux-5.10/Documentation/devicetree/bindings/leds/backlight/ |
| D | lm3630a-backlight.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/lm3630a-backlight.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI LM3630A High-Efficiency Dual-String White LED
10 - Lee Jones <lee.jones@linaro.org>
11 - Daniel Thompson <daniel.thompson@linaro.org>
12 - Jingoo Han <jingoohan1@gmail.com>
15 The LM3630A is a current-mode boost converter which supplies the power and
26 '#address-cells':
[all …]
|
| /linux-5.10/Documentation/ABI/testing/ |
| D | sysfs-class-backlight-driver-lm3533 | 7 ALS-current-control mode (0, 1), where:
19 Enable ALS-current-control mode (0, 1).
28 What: /sys/class/backlight/<backlight>/linear
33 Set the brightness-mapping mode (0, 1), where:
36 0 exponential mode
37 1 linear mode
45 Set the PWM-input control mask (5 bits), where:
48 bit 5 PWM-input enabled in Zone 4
49 bit 4 PWM-input enabled in Zone 3
50 bit 3 PWM-input enabled in Zone 2
[all …]
|
| D | sysfs-class-led-driver-lm3533 | 7 ALS-current-control mode (1, 2), where:
19 Enable ALS-current-control mode (0, 1).
47 What: /sys/class/leds/<led>/linear
52 Set the brightness-mapping mode (0, 1), where:
55 0 exponential mode
56 1 linear mode
64 Set the PWM-input control mask (5 bits), where:
67 bit 5 PWM-input enabled in Zone 4
68 bit 4 PWM-input enabled in Zone 3
69 bit 3 PWM-input enabled in Zone 2
[all …]
|
| D | sysfs-class-backlight-lm3639 | 2 ------------------------------------------------------------------------------
7 Contact: dri-devel@lists.freedesktop.org
9 (WO) Write to the backlight mapping mode. The backlight current
10 can be mapped for either exponential (value "0") or linear
11 mapping modes (default).
|
| /linux-5.10/include/linux/regulator/ |
| D | driver.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * driver.h -- SoC Regulator driver support.
53 * struct regulator_ops - regulator operations.
66 * return -ENOTRECOVERABLE if regulator can't be read at
69 * regulator; return -ENOTRECOVERABLE if regulator can't
76 * @set_current_limit: Configure a limit for a current-limited regulator.
78 * @get_current_limit: Get the configured limit for a current-limited regulator.
86 * @set_mode: Set the configured operating mode for the regulator.
87 * @get_mode: Get the configured operating mode for the regulator.
89 * @get_status: Return actual (not as-configured) status of regulator, as a
[all …]
|
| D | machine.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * machine.h -- SoC Regulator support, machine/board driver API.
28 * MODE: Regulator operating mode can be changed by software on this
31 * DRMS: Dynamic Regulator Mode Switching is enabled for this regulator.
32 * BYPASS: Regulator can be put into bypass mode
43 * operations in suspend mode
44 * DO_NOTHING_IN_SUSPEND - the default value
45 * DISABLE_IN_SUSPEND - turn off regulator in suspend states
46 * ENABLE_IN_SUSPEND - keep regulator on in suspend states
60 * struct regulator_state - regulator state during low power system states
[all …]
|
| /linux-5.10/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm_color.c | 36 * - Input gamma LUT (de-normalized)
37 * - Input CSC (normalized)
38 * - Surface degamma LUT (normalized)
39 * - Surface CSC (normalized)
40 * - Surface regamma LUT (normalized)
41 * - Output CSC (normalized)
43 * But these aren't a direct mapping to DRM color properties. The current DRM
47 * Plane CTM -> Plane degamma -> Plane CTM -> Plane regamma -> Plane CTM
57 * support any CRTC props with correct blending with multiple planes - but we
62 * respective property is set to NULL. A linear DGM/RGM LUT should also
[all …]
|
| /linux-5.10/drivers/mtd/maps/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "Mapping drivers for chip access"
7 bool "Support non-linear mappings of flash chips"
16 This provides a 'mapping' driver which allows the NOR Flash and
21 with config options or at run-time.
31 Setup a simple mapping via the Kconfig options. Normally the
38 hex "Physical start address of flash mapping"
48 hex "Physical length of flash mapping"
52 This is the total length of the mapping of the flash chips on
73 This provides a 'mapping' driver which allows the NOR Flash, ROM
[all …]
|
| /linux-5.10/include/uapi/drm/ |
| D | drm_fourcc.h | 39 * further describe the buffer's format - for example tiling or compression.
42 * ----------------
56 * vendor-namespaced, and as such the relationship between a fourcc code and a
58 * may preserve meaning - such as number of planes - from the fourcc code,
149 * IEEE 754-2008 binary16 half-precision float
167 …10 fourcc_code('V', 'U', '3', '0') /* Y followed by U then V, 10:10:10. Non-linear modifier only */
171 * 16-xx padding occupy lsb
179 * 16-xx padding occupy lsb except Y410
204 * 1-plane YUV 4:2:0
206 * then V), but the exact Linear layout is undefined.
[all …]
|
| /linux-5.10/include/linux/ |
| D | led-lm3530.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2011 ST-Ericsson SA.
9 * based on leds-lm3530.c by Dan Murphy <D.Murphy@motorola.com>
82 * @mode: mode of operation i.e. Manual, ALS or PWM
83 * @als_input_mode: select source of ALS input - ALS1/2 or average
85 * @pwm_pol_hi: PWM input polarity - active high/active low
87 * @brt_ramp_law: brightness mapping mode - exponential/linear
94 * @brt_val: brightness value (0-127)
95 * @pwm_data: PWM control functions (only valid when the mode is PWM)
98 enum lm3530_mode mode; member
|
| /linux-5.10/Documentation/virt/kvm/ |
| D | mmu.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 - correctness:
18 - security:
21 - performance:
23 - scaling:
25 - hardware:
27 - integration:
31 - dirty tracking:
33 and framebuffer-based displays
34 - footprint:
[all …]
|
| /linux-5.10/Documentation/dev-tools/ |
| D | kasan.rst | 5 --------
8 find out-of-bound and use-after-free bugs. KASAN has two modes: generic KASAN
9 (similar to userspace ASan) and software tag-based KASAN (similar to userspace
12 KASAN uses compile-time instrumentation to insert validity checks before every
17 out-of-bounds accesses for global variables is only supported since Clang 11.
19 Tag-based KASAN is only supported in Clang.
22 riscv architectures, and tag-based KASAN is supported only for arm64.
25 -----
32 CONFIG_KASAN_SW_TAGS (to enable software tag-based KASAN).
36 smaller binary while the latter is 1.1 - 2 times faster.
[all …]
|
| /linux-5.10/arch/x86/kernel/ |
| D | head32.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * linux/arch/i386/kernel/head32.c -- prepare to run common code
63 * Mappings are created both at virtual address 0 (identity mapping)
66 * In PAE mode initial_page_table is statically defined to contain
68 * entries). The identity mapping is handled by pointing two PGD entries
77 #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET) in mk_early_pgtbl_32()
81 /* Enough space to fit pagetables for the low memory linear map */ in mk_early_pgtbl_32()
|
| /linux-5.10/arch/x86/include/asm/xen/ |
| D | interface.h | 2 * arch-x86_32.h
24 * Copyright (c) 2004-2006, K A Fraser
104 #define MACH2PHYS_NR_ENTRIES ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>__MACH2PHYS_SHIFT)
106 /* Maximum number of virtual CPUs in multi-processor guests. */
114 * start of the GDT because some stupid OSes export hard-coded selector values
115 * in their ABI. These hard-coded values are always near the start of the GDT,
135 #define TI_GET_DPL(_ti) ((_ti)->flags & 3)
136 #define TI_GET_IF(_ti) ((_ti)->flags & 4)
137 #define TI_SET_DPL(_ti, _dpl) ((_ti)->flags |= (_dpl))
138 #define TI_SET_IF(_ti, _if) ((_ti)->flags |= ((!!(_if))<<2))
[all …]
|
| /linux-5.10/drivers/gpu/drm/etnaviv/ |
| D | etnaviv_mmu.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2015-2018 Etnaviv Project
6 #include <linux/dma-mapping.h>
29 unmapped_page = context->global->ops->unmap(context, iova, in etnaviv_context_unmap()
51 return -EINVAL; in etnaviv_context_map()
55 ret = context->global->ops->map(context, iova, paddr, pgsize, in etnaviv_context_map()
62 size -= pgsize; in etnaviv_context_map()
65 /* unroll mapping in case something went wrong */ in etnaviv_context_map()
67 etnaviv_context_unmap(context, orig_iova, orig_size - size); in etnaviv_context_map()
80 return -EINVAL; in etnaviv_iommu_map()
[all …]
|
| /linux-5.10/arch/alpha/include/asm/ |
| D | core_irongate.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
9 * IRONGATE is the internal name for the AMD-751 K7 core logic chipset
10 * which provides memory controller and PCI access for NAUTILUS-based
21 * The 21264 supports, and internally recognizes, a 44-bit physical
30 * through the routines given is 32-bit.
38 igcsr32 dev_vendor; /* 0x00 - device ID, vendor ID */
39 igcsr32 stat_cmd; /* 0x04 - status, command */
40 igcsr32 class; /* 0x08 - class code, rev ID */
41 igcsr32 latency; /* 0x0C - header type, PCI latency */
42 igcsr32 bar0; /* 0x10 - BAR0 - AGP */
[all …]
|
| /linux-5.10/mm/ |
| D | memremap.c | 1 /* SPDX-License-Identifier: GPL-2.0 */
21 * constraints on the alignment and size of the mapping (namespace).
24 * the minimum mapping granularity of memremap_pages() is 16MB.
30 * reconfigured into a mode that requires SUBSECTION_SIZE alignment.
46 if (pgmap->type == MEMORY_DEVICE_PRIVATE || in devmap_managed_enable_put()
47 pgmap->type == MEMORY_DEVICE_FS_DAX) in devmap_managed_enable_put()
53 if (pgmap->type == MEMORY_DEVICE_PRIVATE || in devmap_managed_enable_get()
54 pgmap->type == MEMORY_DEVICE_FS_DAX) in devmap_managed_enable_get()
68 xa_store_range(&pgmap_array, PHYS_PFN(range->start), PHYS_PFN(range->end), in pgmap_array_delete()
75 struct range *range = &pgmap->ranges[range_id]; in pfn_first()
[all …]
|
| /linux-5.10/drivers/md/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
29 Software RAID mini-HOWTO, available from
44 a several-second delay in the boot time due to various
50 tristate "Linear (append) mode"
54 use the so-called linear mode, i.e. it will combine the hard disk
58 will be called linear.
63 tristate "RAID-0 (striping) mode"
67 use the so-called raid0 mode, i.e. it will combine the hard disk
73 Software-RAID mini-HOWTO, available from
83 tristate "RAID-1 (mirroring) mode"
[all …]
|
| /linux-5.10/arch/powerpc/kernel/ |
| D | setup_64.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
61 #include <asm/code-patching.h>
66 #include <asm/feature-fixups.h>
99 * If we boot via kdump on a non-primary thread, in setup_tlb_core_data()
106 paca_ptrs[cpu]->tcd_ptr = &paca_ptrs[first]->tcd; in setup_tlb_core_data()
110 * or e6500 tablewalk mode, or else TLB handlers in setup_tlb_core_data()
126 /* Look for ibm,smt-enabled OF option */
153 smt_option = of_get_property(dn, "ibm,smt-enabled", in check_smt_enabled()
168 /* Look for smt-enabled= cmdline option */
174 early_param("smt-enabled", early_smt_enabled);
[all …]
|
| /linux-5.10/drivers/pinctrl/intel/ |
| D | pinctrl-intel.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
26 * struct intel_pingroup - Description about group of pins
30 * @mode: Native mode in which the group is muxed out @pins. Used if @modes
32 * @modes: If not %NULL this will hold mode for each pin in @pins
38 unsigned short mode; member
43 * struct intel_function - Description about a function
55 * struct intel_padgroup - Hardware pad group information
74 * enum - Special treatment for GPIO base in pad group
77 * @INTEL_GPIO_BASE_NOMAP: no GPIO mapping should be created
81 INTEL_GPIO_BASE_ZERO = -2,
[all …]
|
| /linux-5.10/arch/powerpc/include/asm/ |
| D | kvm_host.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
52 /* PPC-specific vcpu->requests bit members */
79 /* Physical Address Mask - allowed range of real mode RAM access */
223 * The reverse mapping array has one entry for each HPTE,
225 * (including the guest physical address of the mapping),
226 * plus forward and backward pointers in a doubly-linked ring
228 * ring are 32-bit HPTE indexes, to save space.
267 /* Host virtual (linear mapping) address of guest HPT */
269 /* Array of reverse mapping entries for each guest HPTE */
287 unsigned int emul_smt_mode; /* emualted SMT mode, on P9 */
[all …]
|
| /linux-5.10/arch/arm64/include/asm/ |
| D | kvm_mmu.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2012,2013 - ARM Ltd
20 * Instead, give the HYP mode its own VA region at a fixed offset from
29 * and that half of that space (VA_BITS - 1) is used for the linear
30 * mapping, we can also limit the EL2 space to (VA_BITS - 1).
33 * top or the bottom half of that space to shadow the kernel's linear
34 * mapping?". As we need to idmap the trampoline page, this is
41 * if (T & BIT(VA_BITS - 1))
44 * HYP_VA_MIN = 1 << (VA_BITS - 1)
45 * HYP_VA_MAX = HYP_VA_MIN + (1 << (VA_BITS - 1)) - 1
[all …]
|
| /linux-5.10/Documentation/vm/ |
| D | hwpoison.rst | 38 linear algorithmic complexity, because the data structures have not
40 for the mapping from a vma to a process. Since this case is expected
43 The code consists of a the high level handler in mm/memory-failure.c,
48 of applications. KVM support requires a recent qemu-kvm release.
71 This is the mode used by KVM qemu.
85 Enable early kill mode globally
88 Set early/late kill mode/revert to system default
93 arg2 defines thread specific mode
108 return current mode
113 * madvise(MADV_HWPOISON, ....) (as root) - Poison a page in the
[all …]
|
| /linux-5.10/drivers/spi/ |
| D | spi-zynq-qspi.c | 1 // SPDX-License-Identifier: GPL-2.0+
18 #include <linux/spi/spi-mem.h>
28 #define ZYNQ_QSPI_TXD_00_00_OFFSET 0x1C /* Transmit 4-byte inst, WO */
29 #define ZYNQ_QSPI_TXD_00_01_OFFSET 0x80 /* Transmit 1-byte inst, WO */
30 #define ZYNQ_QSPI_TXD_00_10_OFFSET 0x84 /* Transmit 2-byte inst, WO */
31 #define ZYNQ_QSPI_TXD_00_11_OFFSET 0x88 /* Transmit 3-byte inst, WO */
37 #define ZYNQ_QSPI_LINEAR_CFG_OFFSET 0xA0 /* Linear Adapter Config Ref, RW */
48 #define ZYNQ_QSPI_CONFIG_MANSRTEN_MASK BIT(15) /* Enable Manual TX Mode */
54 #define ZYNQ_QSPI_CONFIG_MSTREN_MASK BIT(0) /* Master Mode */
57 * QSPI Configuration Register - Baud rate and slave select
[all …]
|
| /linux-5.10/drivers/iommu/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
2 # The IOVA library may also be used by non-IOMMU_API users
6 # The IOASID library may also be used by non-IOMMU_API users
39 sizes at both stage-1 and stage-2, as well as address spaces
40 up to 48-bits in size.
46 Enable self-tests for LPAE page table allocator. This performs
47 a series of page-table consistency checks during boot.
56 Enable support for the ARM Short-descriptor pagetable format.
57 This supports 32-bit virtual and physical addresses mapped using
58 2-level tables with 4KB pages/1MB sections, and contiguous entries
[all …]
|