asm/xen/interface.h

2  * arch-x86_32.h
24  * Copyright (c) 2004-2006, K A Fraser
104 #define MACH2PHYS_NR_ENTRIES  ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>__MACH2PHYS_SHIFT)
106 /* Maximum number of virtual CPUs in multi-processor guests. */
114  * start of the GDT because some stupid OSes export hard-coded selector values
115  * in their ABI. These hard-coded values are always near the start of the GDT,
135 #define TI_GET_DPL(_ti)		((_ti)->flags & 3)
136 #define TI_GET_IF(_ti)		((_ti)->flags & 4)
137 #define TI_SET_DPL(_ti, _dpl)	((_ti)->flags |= (_dpl))
138 #define TI_SET_IF(_ti, _if)	((_ti)->flags |= ((!!(_if))<<2))
143     uint8_t       flags;   /* 0-3: privilege level; 4: clear event enable?  */
159 	 * 3-level p2m tree. In this case the linear mapper p2m list anchored
171 	 * p2m_vaddr holds the virtual address of the linear p2m list. All
176 	 * mapping update is in progress. This allows guest external software
179 	 * Modifying a p2m element in the linear p2m list is allowed via an
184 	unsigned long p2m_generation;	/* generation count of p2m mapping */
194 #include <asm/pvclock-abi.h>
204  * - For HVM guests, the structures read include: fpu_ctxt (if
207  * - PVH guests are the same as HVM guests, but additionally use ctrlreg[3] to
212     struct { char x[512]; } fpu_ctxt;       /* User-level FPU registers     */
226     struct cpu_user_regs user_regs;         /* User-level CPU registers     */
228     unsigned long ldt_base, ldt_ents;       /* LDT (linear address, # ents) */
232     unsigned long ctrlreg[8];               /* CR0-CR7 (control registers)  */
233     unsigned long debugreg[8];              /* DB0-DB7 (debug registers)    */
316 #define PMU_SAMPLE_USER	   (1<<1) /* Sample is from user or kernel mode */
321  * Architecture-specific information describing state of the processor at
358 	 * Vendor-specific PMU registers.
379  * Prefix forces emulation of some non-trapping instructions.