Home
last modified time | relevance | path

Searched +full:dt +full:- +full:binding (Results 1 – 25 of 376) sorted by relevance

12345678910>>...16

/linux/Documentation/devicetree/bindings/
H A Dsubmitting-patches.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Submitting Devicetree (DT) binding patches
11 Documentation/process/submitting-patches.rst applies.
13 1) The Documentation/ and include/dt-bindings/ portion of the patch should
14 be a separate patch. The preferred subject prefix for binding patches is::
16 "dt-bindings: <binding dir>: ..."
21 "<binding dir>: dt-bindings: ..."
26 schema format. Repeating "binding" again should also be avoided, so for
29 "dt-bindings: iio: adc: Add ROHM BD79100G"
31 Conversion of other formats to DT schema::
[all …]
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 DT_DOC_CHECKER ?= dt-doc-validate
3 DT_EXTRACT_EX ?= dt-extract-example
4 DT_MK_SCHEMA ?= dt-mk-schema
19 $(DT_DOC_CHECKER) --version 2>/dev/null || echo 0; } | sort -Vc >/dev/null || \
28 find_all_cmd = find $(src) \( -name '*.yaml' ! \
29 -name 'processed-schema*' \)
33 grep -F -e "$(subst :," -e ",$(DT_SCHEMA_FILES))" | \
39 xargs -n200 -P$$(nproc) \
40 $(DT_SCHEMA_LINT) -f parsable -c $(src)/.yamllint >&2) \
[all …]
H A DABI.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Devicetree (DT) ABI
7 I. Regarding stable bindings/ABI, we quote from the 2013 ARM mini-summit
10 "That still leaves the question of, what does a stable binding look
11 like? Certainly a stable binding means that a newer kernel will not
12 break on an older device tree, but that doesn't mean the binding is
15 then default to the previous behaviour if it is missing. If a binding
21 II. General binding rules
24 binding because it isn't perfect.
30 the old binding. ie. add additional properties, but don't change the
H A Dexample-schema.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 # All the top-level keys are standard json-schema keywords except for
10 $id: http://devicetree.org/schemas/example-schema.yaml#
11 # $schema is the meta-schema this schema should be validated with.
12 $schema: http://devicetree.org/meta-schemas/core.yaml#
17 - Rob Herring <robh@kernel.org>
20 A more detailed multi-line description of the binding.
29 # 'select' is a schema applied to a DT node to determine if this binding
36 # A dictionary of DT properties for this binding schema
[all …]
/linux/Documentation/devicetree/bindings/iommu/
H A Dmediatek,iommu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yong Wu <yong.wu@mediatek.com>
16 ARM Short-Descriptor translation table format for address translation.
24 +--------+
26 gals0-rx gals1-rx (Global Async Local Sync rx)
29 gals0-tx gals1-tx (Global Async Local Sync tx)
31 +--------+
35 +----------------+-------
[all …]
/linux/drivers/gpu/drm/ci/
H A Ddt-binding-check.sh2 # SPDX-License-Identifier: MIT
4 set -euxo pipefail
6 VENV_PATH="${VENV_PATH:-/tmp/dtschema-venv}"
9 if ! make -j"${FDO_CI_CONCURRENT:-4}" dt_binding_check \
10 DT_SCHEMA_FILES="${SCHEMA:-}" 2>dt-binding-check.log; then
11 echo "ERROR: 'make dt_binding_check' failed. Please check dt-binding-check.log for details."
15 if [[ -s dt-binding-check.log ]]; then
16 echo "WARNING: dt_binding_check reported warnings. Please check dt-binding-check.log" \
H A Dcheck-devicetrees.yml1 .dt-check-base:
2 stage: static-checks
8 VENV_PATH: "/tmp/dtcheck-venv"
10 - apt-get update -qq
12 …# In mesa-ci containers, LLVM_VERSION is defined as a container-level property and is currently se…
13 …- apt-get install -y --no-install-recommends clang-${LLVM_VERSION} lld-${LLVM_VERSION} llvm-${LLVM…
14 - python3 -m venv "${VENV_PATH}"
15 - source "${VENV_PATH}/bin/activate"
16 - pip3 install dtschema
18 - drivers/gpu/drm/ci/${SCRIPT_NAME}
[all …]
/linux/Documentation/devicetree/bindings/clock/ti/
H A Ddra7-atl.txt7 signals - can compensate the drift between the two ws signal.
12 Clock tree binding:
13 This binding uses the common clock binding[1].
14 To be able to integrate the ATL clocks with DT clock tree.
16 Since the clock instances are part of a single IP this binding is used as a node
17 for the DT clock tree, the IP driver is needed to handle the actual configuration
20 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
23 - compatible : shall be "ti,dra7-atl-clock"
24 - #clock-cells : from common clock binding; shall be set to 0.
25 - clocks : link phandles to functional clock of ATL
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dalphascale,asm9260-clock-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/alphascale,asm9260-clock-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Oleksij Rempel <linux@rempel-privat.de>
16 Simple one-cell clock specifier format is used, where the only cell is used
18 It is encouraged to use dt-binding for clock index definitions. SoC specific
19 dt-binding should be included to the device tree descriptor. For example
22 #include <dt-bindings/clock/alphascale,asm9260.h>
24 This binding contains two types of clock providers:
[all …]
H A Dclk-palmas-clk32kg-clocks.txt5 This binding uses the common clock binding ./clock-bindings.txt.
8 - compatible : "ti,palmas-clk32kg" for clk32kg clock
9 "ti,palmas-clk32kgaudio" for clk32kgaudio clock
10 - #clock-cells : shall be set to 0.
13 - ti,external-sleep-control: The external enable input pins controlled the
22 dt-bindings/mfd/palmas.h
25 #include <dt-bindings/mfd/palmas.h>
30 compatible = "ti,palmas-clk32kg";
31 #clock-cells = <0>;
32 ti,external-sleep-control = <PALMAS_EXT_CONTROL_PIN_NSLEEP>;
H A Dimg,boston-clock.txt1 Binding for Imagination Technologies MIPS Boston clock sources.
3 This binding uses the common clock binding[1].
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
11 - compatible : Should be "img,boston-clock".
12 - #clock-cells : Should be set to 1.
14 <dt-bindings/clock/boston-clock.h>
18 system-controller@17ffd000 {
19 compatible = "img,boston-platform-regs", "syscon";
23 compatible = "img,boston-clock";
24 #clock-cells = <1>;
H A Dbaikal,bt1-ccu-div.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/clock/baikal,bt1-ccu-div.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Baikal-T1 Clock Control Unit Dividers
11 - Serge Semin <fancer.lancer@gmail.com>
14 Clocks Control Unit is the core of Baikal-T1 SoC System Controller
18 IP-blocks or to groups of blocks (clock domains). The transformation is done
19 by means of an embedded into CCU PLLs and gateable/non-gateable dividers. The
20 later ones are described in this binding. Each clock domain can be also
[all …]
H A Dcirrus,lochnagar.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
15 Logic devices on mini-cards, as well as allowing connection of various
21 This binding document describes the binding for the clock portion of the
24 Also see these documents for generic binding information:
25 [1] Clock : ../clock/clock-bindings.txt
28 [2] include/dt-bindings/clock/lochnagar.h
30 This binding must be part of the Lochnagar MFD binding:
[all …]
/linux/Documentation/devicetree/bindings/reset/
H A Dreset.txt3 This binding is intended to represent the hardware reset signals present
10 reset consumer (the module being reset, or a module managing when a sub-
11 ordinate module is reset). This binding exists to represent the provider and
15 specifier - a list of DT cells that represents the reset signal within the
17 are dictated by the binding of the reset provider, although common schemes
23 the DT node of each affected HW block, since if activated, an unrelated block
24 may be reset. Instead, reset signals should be represented in the DT node
27 block node for dedicated reset signals. The intent of this binding is to give
35 #reset-cells: Number of cells in a reset specifier; Typically 0 for nodes
41 rst: reset-controller {
[all …]
H A Dsnps,hsdk-reset.txt1 Binding for the Synopsys HSDK reset controller
3 This binding uses the common reset binding[1].
8 - compatible: should be "snps,hsdk-reset".
9 - reg: should always contain 2 pairs address - length: first for reset
12 - #reset-cells: from common reset binding; Should always be set to 1.
16 compatible = "snps,hsdk-reset";
17 #reset-cells = <1>;
28 The index could be found in <dt-bindings/reset/snps,hsdk-reset.h>
/linux/Documentation/devicetree/bindings/thermal/
H A Dmax77620_thermal.txt10 -------------------
11 #thermal-sensor-cells: For more details, please refer to
12 <devicetree/bindings/thermal/thermal-sensor.yaml>
15 For more details, please refer generic thermal DT binding document
18 Please refer <devicetree/bindings/mfd/max77620.txt> for mfd DT binding
22 --------
23 #include <dt-bindings/mfd/max77620.h>
24 #include <dt-bindings/thermal/thermal.h>
31 #thermal-sensor-cells = <0>;
36 cool_dev: cool-dev {
[all …]
/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,padding.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
16 width of a layer to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled,
24 - enum:
25 - mediatek,mt8188-disp-padding
26 - mediatek,mt8195-mdp3-padding
27 - items:
[all …]
/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio.txt5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
21 binding of the device.
24 and bit-banged data signals:
27 gpio-controller;
28 #gpio-cells = <2>;
32 data-gpios = <&gpio1 12 0>,
43 documented in the device tree binding for the device, but it is strongly
[all …]
H A Dnvidia,tegra186-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nvidia,tegra186-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 controller. This binding document applies to both controllers. The register
53 controller, are both extremely non-linear. The header file
54 <dt-bindings/gpio/tegra186-gpio.h> describes the port-level mapping. In
57 particular controller. Drivers need to map between the DT GPIO IDs and HW
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Dmax77620.txt4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
19 are defined at dt-bindings/mfd/max77620.h.
21 - system-power-controller: Indicates that this PMIC is controlling the
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt65xx-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt65xx-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@kernel.org>
18 - mediatek,mt2701-pinctrl
19 - mediatek,mt2712-pinctrl
20 - mediatek,mt6397-pinctrl
21 - mediatek,mt7623-pinctrl
22 - mediatek,mt8127-pinctrl
[all …]
H A Dmediatek,mt8192-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8192-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@mediatek.com>
17 const: mediatek,mt8192-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
23 Number of cells in GPIO specifier. Since the generic GPIO binding is used,
25 binding representation for description of particular cells.
[all …]
H A Dnvidia,tegra124-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra124-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 description: The Tegra124 pinctrl binding is very similar to the Tegra20 and
14 Tegra30 pinctrl binding, as described in nvidia,tegra20-pinmux.yaml and
15 nvidia,tegra30-pinmux.yaml. In fact, this document assumes that binding as a
21 - const: nvidia,tegra124-pinmux
[all …]
/linux/Documentation/process/
H A Dmaintainer-soc.rst1 .. SPDX-License-Identifier: GPL-2.0
8 --------
10 The SoC subsystem is a place of aggregation for SoC-specific code.
13 * devicetrees for 32- & 64-bit ARM and RISC-V
14 * 32-bit ARM board files (arch/arm/mach*)
15 * 32- & 64-bit ARM defconfigs
16 * SoC-specific drivers across architectures, in particular for 32- & 64-bit
17 ARM, RISC-V and Loongarch
19 These "SoC-specific drivers" do not include clock, GPIO etc drivers that have
20 other top-level maintainers. The drivers/soc/ directory is generally meant
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dsnps,dwc-qos-ethernet.txt3 This binding is deprecated, but it continues to be supported, but new
4 features should be preferably added to the stmmac binding document.
6 This binding supports the Synopsys Designware Ethernet QoS (Quality Of Service)
13 - compatible: One of:
14 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10"
15 Represents the IP core when integrated into the Axis ARTPEC-6 SoC.
16 - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10"
18 - "snps,dwc-qos-ethernet-4.10"
20 "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10". It is supported to be
21 compatible with earlier revisions of this binding.
[all …]

12345678910>>...16