| /linux/Documentation/arch/loongarch/ |
| H A D | irq-chip-model.rst | 8 with LS7A chipsets. The irq chips in LoongArch computers include CPUINTC (CPU Core
14 CPUINTC is a per-core controller (in CPU), LIOINTC/EIOINTC/HTVECINTC are per-package
23 to CPUINTC directly, CPU UARTS interrupts go to LIOINTC, while all other devices
25 to LIOINTC, and then CPUINTC::
28 | IPI | --> | CPUINTC | <-- | Timer |
60 to CPUINTC directly, CPU UARTS interrupts go to LIOINTC, while all other devices
62 to CPUINTC directly::
65 | IPI | --> | CPUINTC | <-- | Timer |
92 go to CPUINTC directly, CPU UARTS interrupts go to PCH-PIC, while all other
94 Extended I/O Interrupt Controller), and then go to CPUINTC directly::
[all …]
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| /linux/arch/mips/boot/dts/ralink/ |
| H A D | mt7620a.dtsi | 15 cpuintc: cpuintc { label
44 interrupt-parent = <&cpuintc>;
72 interrupt-parent = <&cpuintc>;
|
| H A D | rt2880.dtsi | 15 cpuintc: cpuintc { label
44 interrupt-parent = <&cpuintc>;
|
| H A D | rt3883.dtsi | 15 cpuintc: cpuintc { label
44 interrupt-parent = <&cpuintc>;
|
| H A D | rt3050.dtsi | 15 cpuintc: cpuintc { label
44 interrupt-parent = <&cpuintc>;
|
| H A D | mt7628a.dtsi | 20 cpuintc: interrupt-controller { label
153 interrupt-parent = <&cpuintc>;
298 interrupt-parent = <&cpuintc>;
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| /linux/Documentation/translations/zh_CN/arch/loongarch/ |
| H A D | irq-chip-model.rst | 31 | IPI | --> | CPUINTC | <-- | Timer |
67 | IPI | --> | CPUINTC | <-- | Timer |
98 | IPI |--> | CPUINTC(0-255vcpu)| <-- | Timer |
154 | IPI | --> | CPUINTC | <-- | Timer |
180 CPUINTC::
238 - CPUINTC：即《龙芯架构参考手册卷一》第7.4节所描述的CSR.ECFG/CSR.ESTAT寄存器及其
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| /linux/Documentation/translations/zh_TW/arch/loongarch/ |
| H A D | irq-chip-model.rst | 31 | IPI | --> | CPUINTC | <-- | Timer |
67 | IPI | --> | CPUINTC | <-- | Timer |
93 CPUINTC::
151 - CPUINTC：即《龍芯架構參考手冊卷一》第7.4節所描述的CSR.ECFG/CSR.ESTAT寄存器及其
|
| /linux/arch/mips/boot/dts/realtek/ |
| H A D | rtl838x.dtsi | 30 cpuintc: cpuintc { label
97 interrupt-parent = <&cpuintc>;
|
| H A D | rtl930x.dtsi | 14 cpuintc: cpuintc { label
123 interrupt-parent = <&cpuintc>;
|
| /linux/arch/mips/boot/dts/qca/ |
| H A D | ar9132.dtsi | 22 cpuintc: interrupt-controller { label
40 interrupt-parent = <&cpuintc>;
116 interrupt-parent = <&cpuintc>;
|
| H A D | ar9331.dtsi | 22 cpuintc: interrupt-controller { label
44 interrupt-parent = <&cpuintc>;
104 interrupt-parent = <&cpuintc>;
|
| /linux/arch/mips/boot/dts/loongson/ |
| H A D | loongson64g-package.dtsi | 9 cpuintc: interrupt-controller { label
31 interrupt-parent = <&cpuintc>;
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| H A D | loongson64c-package.dtsi | 9 cpuintc: interrupt-controller { label
34 interrupt-parent = <&cpuintc>;
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| H A D | loongson64v_4core_virtio.dts | 11 cpuintc: interrupt-controller { label
33 interrupt-parent = <&cpuintc>;
|
| H A D | loongson64-2k1000.dtsi | 32 cpuintc: interrupt-controller { label
69 interrupt-parent = <&cpuintc>;
89 interrupt-parent = <&cpuintc>;
|
| /linux/arch/mips/boot/dts/econet/ |
| H A D | en751221.dtsi | 26 cpuintc: interrupt-controller { label
36 interrupt-parent = <&cpuintc>;
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| /linux/arch/mips/boot/dts/mscc/ |
| H A D | luton.dtsi | 25 cpuintc: interrupt-controller { label
64 interrupt-parent = <&cpuintc>;
|
| H A D | serval.dtsi | 28 cpuintc: interrupt-controller { label
67 interrupt-parent = <&cpuintc>;
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| H A D | jaguar2.dtsi | 29 cpuintc: interrupt-controller { label
68 interrupt-parent = <&cpuintc>;
|
| /linux/arch/mips/boot/dts/xilfpga/ |
| H A D | nexys4ddr.dts | 22 cpuintc: interrupt-controller { label
37 interrupt-parent = <&cpuintc>;
|
| /linux/Documentation/devicetree/bindings/timer/ |
| H A D | ralink,cevt-systick.yaml | 35 interrupt-parent = <&cpuintc>;
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| /linux/arch/loongarch/boot/dts/ |
| H A D | loongson-2k0500.dtsi | 34 cpuintc: interrupt-controller { label
135 interrupt-parent = <&cpuintc>;
153 interrupt-parent = <&cpuintc>;
168 interrupt-parent = <&cpuintc>;
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| /linux/arch/mips/boot/dts/ingenic/ |
| H A D | x1830.dtsi | 25 cpuintc: interrupt-controller { label
39 interrupt-parent = <&cpuintc>;
92 interrupt-parent = <&cpuintc>;
|
| H A D | x1000.dtsi | 25 cpuintc: interrupt-controller { label
39 interrupt-parent = <&cpuintc>;
99 interrupt-parent = <&cpuintc>;
|