xref: /linux/arch/mips/boot/dts/ralink/rt3050.dtsi (revision 4f9786035f9e519db41375818e1d0b5f20da2f10)

// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/clock/mediatek,mtmips-sysc.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc";

	cpus {
		cpu@0 {
			compatible = "mips,mips24KEc";
		};
	};

	cpuintc: cpuintc {
		#address-cells = <0>;
		#interrupt-cells = <1>;
		interrupt-controller;
		compatible = "mti,cpu-interrupt-controller";
	};

	palmbus@10000000 {
		compatible = "palmbus";
		reg = <0x10000000 0x200000>;
		ranges = <0x0 0x10000000 0x1FFFFF>;

		#address-cells = <1>;
		#size-cells = <1>;

		sysc: syscon@0 {
			compatible = "ralink,rt3052-sysc", "ralink,rt3050-sysc", "syscon";
			reg = <0x0 0x100>;
			#clock-cells = <1>;
			#reset-cells = <1>;
		};

		intc: intc@200 {
			compatible = "ralink,rt3052-intc", "ralink,rt2880-intc";
			reg = <0x200 0x100>;

			interrupt-controller;
			#interrupt-cells = <1>;

			interrupt-parent = <&cpuintc>;
			interrupts = <2>;
		};

		memc@300 {
			compatible = "ralink,rt3052-memc", "ralink,rt3050-memc";
			reg = <0x300 0x100>;
		};

		uartlite@c00 {
			compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
			reg = <0xc00 0x100>;

			clocks = <&sysc RT305X_CLK_UARTLITE>;

			interrupt-parent = <&intc>;
			interrupts = <12>;

			reg-shift = <2>;
		};
	};

	usb@101c0000 {
		compatible = "ralink,rt3050-usb", "snps,dwc2";
		reg = <0x101c0000 40000>;

		interrupt-parent = <&intc>;
		interrupts = <18>;

		status = "disabled";
	};
};