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/linux-5.10/Documentation/devicetree/bindings/mmc/
Dsocionext,uniphier-sd.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/socionext,uniphier-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
16 - socionext,uniphier-sd-v2.91
17 - socionext,uniphier-sd-v3.1
18 - socionext,uniphier-sd-v3.1.1
29 reset-names:
31 There are three reset signals at maximum
[all …]
Dmmci.txt7 by mmc.txt and the properties used by the mmci driver. Using "st" as
11 - compatible : contains "arm,pl18x", "arm,primecell".
12 - vmmc-supply : phandle to the regulator device tree node, mentioned
16 - arm,primecell-periphid : contains the PrimeCell Peripheral ID, it overrides
17 the ID provided by the HW
18 - resets : phandle to internal reset line.
20 - vqmmc-supply : phandle to the regulator device tree node, mentioned
23 - st,sig-dir-dat0 : bus signal direction pin used for DAT[0].
24 - st,sig-dir-dat2 : bus signal direction pin used for DAT[2].
25 - st,sig-dir-dat31 : bus signal direction pin used for DAT[3] and DAT[1].
[all …]
Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MMC Controller Generic Binding
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 These properties are common to multiple MMC host controllers. Any host
17 It is possible to assign a fixed index mmcN to an MMC host controller
23 pattern: "^mmc(@.*)?$"
25 "#address-cells":
[all …]
Dsdhci-sprd.txt1 * Spreadtrum SDHCI controller (sdhci-sprd)
4 for MMC, SD and SDIO types of cards.
6 This file documents differences between the core properties in mmc.txt
7 and the properties used by the sdhci-sprd driver.
10 - compatible: Should contain "sprd,sdhci-r11".
11 - reg: physical base address of the controller and length.
12 - interrupts: Interrupts used by the SDHCI controller.
13 - clocks: Should contain phandle for the clock feeding the SDHCI controller
14 - clock-names: Should contain the following:
15 "sdio" - SDIO source clock (required)
[all …]
/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3368-r88.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
15 stdout-path = "serial2:115200n8";
23 emmc_pwrseq: emmc-pwrseq {
24 compatible = "mmc-pwrseq-emmc";
25 pinctrl-0 = <&emmc_reset>;
26 pinctrl-names = "default";
27 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
30 keys: gpio-keys {
[all …]
Dpx30-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
14 compatible = "rockchip,px30-evb", "rockchip,px30";
17 stdout-path = "serial5:115200n8";
20 adc-keys {
21 compatible = "adc-keys";
22 io-channels = <&saradc 2>;
[all …]
Drk3328-a1.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
2 // Copyright (c) 2017-2019 Arm Ltd.
4 /dts-v1/;
9 compatible = "azw,beelink-a1", "rockchip,rk3328";
15 * /-------
16 * L / o <- Gnd
17 * e / o <-- Rx
18 * f / o <--- Tx
19 * t / o <---- +3.3v
23 stdout-path = "serial2:1500000n8";
[all …]
Drk3328-rock64.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
14 stdout-path = "serial2:1500000n8";
17 gmac_clkin: external-gmac-clock {
18 compatible = "fixed-clock";
19 clock-frequency = <125000000>;
20 clock-output-names = "gmac_clkin";
21 #clock-cells = <0>;
24 vcc_sd: sdmmc-regulator {
25 compatible = "regulator-fixed";
[all …]
Drk3399-leez-p710.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399-opp.dtsi"
17 stdout-path = "serial2:1500000n8";
20 clkin_gmac: external-gmac-clock {
21 compatible = "fixed-clock";
22 clock-frequency = <125000000>;
23 clock-output-names = "clkin_gmac";
[all …]
Drk3368-evb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2015 Caesar Wang <wxt@rock-chips.com>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/pwm/pwm.h>
12 stdout-path = "serial2:115200n8";
21 compatible = "pwm-backlight";
22 brightness-levels = <
55 default-brightness-level = <128>;
56 enable-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
57 pinctrl-names = "default";
[all …]
Drk3399-hugsun-x99.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /dts-v1/;
3 #include <dt-bindings/pwm/pwm.h>
4 #include <dt-bindings/input/input.h>
6 #include "rk3399-opp.dtsi"
13 stdout-path = "serial2:1500000n8";
16 clkin_gmac: external-gmac-clock {
17 compatible = "fixed-clock";
18 clock-frequency = <125000000>;
19 clock-output-names = "clkin_gmac";
[all …]
/linux-5.10/arch/arm/boot/dts/
Duniphier-ld4.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-ld4";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
23 enable-method = "psci";
[all …]
Duniphier-sld8.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-sld8";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
23 enable-method = "psci";
[all …]
Drk3229-xms6.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/input/input.h>
17 dc_12v: dc-12v-regulator {
18 compatible = "regulator-fixed";
19 regulator-name = "dc_12v";
20 regulator-always-on;
21 regulator-boot-on;
22 regulator-min-microvolt = <12000000>;
23 regulator-max-microvolt = <12000000>;
[all …]
Drk3288-veyron.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
14 stdout-path = "serial2:115200n8";
27 power_button: power-button {
28 compatible = "gpio-keys";
29 pinctrl-names = "default";
30 pinctrl-0 = <&pwr_key_l>;
36 debounce-interval = <100>;
37 wakeup-source;
[all …]
Dsunxi-h3-h5-emlid-neutis.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
8 #include "sunxi-common-regulators.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
18 stdout-path = "serial0:115200n8";
22 compatible = "mmc-pwrseq-simple";
23 reset-gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */
24 post-power-on-delay-ms = <200>;
26 clock-names = "ext_clock";
31 cpu-supply = <&vdd_cpux>;
78 vmmc-supply = <&reg_vcc3v3>;
[all …]
Drk3288-tinker.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/clock/rockchip,rk808.h>
12 stdout-path = "serial2:115200n8";
20 ext_gmac: external-gmac-clock {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <125000000>;
24 clock-output-names = "ext_gmac";
27 gpio-keys {
[all …]
Duniphier-pro4.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-pro4";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
23 enable-method = "psci";
[all …]
Drk3288-popmetal.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2014, 2015 Andy Yan <andy.yan@rock-chips.com>
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
11 model = "PopMetal-RK3288";
12 compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
21 clock-frequency = <125000000>;
22 clock-output-names = "ext_gmac";
[all …]
Drk3288-rock2-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/pwm/pwm.h>
12 emmc_pwrseq: emmc-pwrseq {
13 compatible = "mmc-pwrseq-emmc";
14 pinctrl-0 = <&emmc_reset>;
15 pinctrl-names = "default";
16 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
[all …]
Drk3288-evb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/pwm/pwm.h>
13 adc-keys {
14 compatible = "adc-keys";
15 io-channels = <&saradc 1>;
16 io-channel-names = "buttons";
17 keyup-threshold-microvolt = <1800000>;
19 button-up {
22 press-threshold-microvolt = <100000>;
[all …]
/linux-5.10/arch/arm64/boot/dts/allwinner/
Dsun50i-h5-orangepi-zero-plus2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-h5.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
12 compatible = "xunlong,orangepi-zero-plus2", "allwinner,sun50i-h5";
19 stdout-path = "serial0:115200n8";
23 compatible = "hdmi-connector";
28 remote-endpoint = <&hdmi_out_con>;
34 compatible = "gpio-leds";
39 default-state = "on";
[all …]
Dsun50i-a64-olinuxino-emmc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 #include "sun50i-a64-olinuxino.dts"
8 model = "Olimex A64-Olinuxino-eMMC";
9 compatible = "olimex,a64-olinuxino-emmc", "allwinner,sun50i-a64";
13 pinctrl-names = "default";
14 pinctrl-0 = <&mmc2_pins>;
15 vmmc-supply = <&reg_dcdc1>;
16 vqmmc-supply = <&reg_eldo1>;
17 bus-width = <8>;
18 non-removable;
[all …]
Dsun50i-h5-nanopi-neo-plus2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 /dts-v1/;
6 #include "sun50i-h5.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/pinctrl/sun4i-a10.h>
14 compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
22 stdout-path = "serial0:115200n8";
26 compatible = "gpio-leds";
31 default-state = "on";
[all …]
/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt8183-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
14 compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
26 stdout-path = "serial0:921600n8";
29 reserved-memory {
30 #address-cells = <2>;
31 #size-cells = <2>;
34 compatible = "shared-dma-pool";
36 no-map;
46 pinctrl-names = "default";
[all …]

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