Lines Matching +full:cap +full:- +full:mmc +full:- +full:hw +full:- +full:reset
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
14 compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
26 stdout-path = "serial0:921600n8";
29 reserved-memory {
30 #address-cells = <2>;
31 #size-cells = <2>;
34 compatible = "shared-dma-pool";
36 no-map;
46 pinctrl-names = "default";
47 pinctrl-0 = <&i2c_pins_0>;
49 clock-frequency = <100000>;
53 pinctrl-names = "default";
54 pinctrl-0 = <&i2c_pins_1>;
56 clock-frequency = <100000>;
60 pinctrl-names = "default";
61 pinctrl-0 = <&i2c_pins_2>;
63 clock-frequency = <100000>;
67 pinctrl-names = "default";
68 pinctrl-0 = <&i2c_pins_3>;
70 clock-frequency = <100000>;
74 pinctrl-names = "default";
75 pinctrl-0 = <&i2c_pins_4>;
77 clock-frequency = <1000000>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&i2c_pins_5>;
84 clock-frequency = <1000000>;
89 pinctrl-names = "default", "state_uhs";
90 pinctrl-0 = <&mmc0_pins_default>;
91 pinctrl-1 = <&mmc0_pins_uhs>;
92 bus-width = <8>;
93 max-frequency = <200000000>;
94 cap-mmc-highspeed;
95 mmc-hs200-1_8v;
96 mmc-hs400-1_8v;
97 cap-mmc-hw-reset;
98 no-sdio;
99 no-sd;
100 hs400-ds-delay = <0x12814>;
101 vmmc-supply = <&mt6358_vemc_reg>;
102 vqmmc-supply = <&mt6358_vio18_reg>;
103 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
104 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
105 non-removable;
110 pinctrl-names = "default", "state_uhs";
111 pinctrl-0 = <&mmc1_pins_default>;
112 pinctrl-1 = <&mmc1_pins_uhs>;
113 bus-width = <4>;
114 max-frequency = <200000000>;
115 cap-sd-highspeed;
116 sd-uhs-sdr50;
117 sd-uhs-sdr104;
118 cap-sdio-irq;
119 no-mmc;
120 no-sd;
121 vmmc-supply = <&mt6358_vmch_reg>;
122 vqmmc-supply = <&mt6358_vmc_reg>;
123 keep-power-in-suspend;
124 enable-sdio-wakeup;
125 non-removable;
133 mediatek,pull-up-adv = <3>;
134 mediatek,drive-strength-adv = <00>;
142 mediatek,pull-up-adv = <3>;
143 mediatek,drive-strength-adv = <00>;
151 mediatek,pull-up-adv = <3>;
152 mediatek,drive-strength-adv = <00>;
160 mediatek,pull-up-adv = <3>;
161 mediatek,drive-strength-adv = <00>;
169 mediatek,pull-up-adv = <3>;
170 mediatek,drive-strength-adv = <00>;
178 mediatek,pull-up-adv = <3>;
179 mediatek,drive-strength-adv = <00>;
189 bias-disable;
204 input-enable;
205 bias-pull-up;
210 bias-pull-down;
215 bias-pull-up;
230 input-enable;
231 drive-strength = <MTK_DRIVE_10mA>;
232 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
237 drive-strength = <MTK_DRIVE_10mA>;
238 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
243 drive-strength = <MTK_DRIVE_10mA>;
244 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
249 drive-strength = <MTK_DRIVE_10mA>;
250 bias-pull-up;
261 input-enable;
262 bias-pull-up;
267 input-enable;
268 bias-pull-down;
274 output-high;
285 drive-strength = <MTK_DRIVE_6mA>;
286 input-enable;
287 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
292 drive-strength = <MTK_DRIVE_6mA>;
293 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
294 input-enable;
304 bias-disable;
314 bias-disable;
324 bias-disable;
334 bias-disable;
344 bias-disable;
350 pinctrl-names = "default";
351 pinctrl-0 = <&spi_pins_0>;
352 mediatek,pad-select = <0>;
357 pinctrl-names = "default";
358 pinctrl-0 = <&spi_pins_1>;
359 mediatek,pad-select = <0>;
364 pinctrl-names = "default";
365 pinctrl-0 = <&spi_pins_2>;
366 mediatek,pad-select = <0>;
371 pinctrl-names = "default";
372 pinctrl-0 = <&spi_pins_3>;
373 mediatek,pad-select = <0>;
378 pinctrl-names = "default";
379 pinctrl-0 = <&spi_pins_4>;
380 mediatek,pad-select = <0>;
385 pinctrl-names = "default";
386 pinctrl-0 = <&spi_pins_5>;
387 mediatek,pad-select = <0>;