/qemu/tests/docker/dockerfiles/ |
H A D | debian-armhf-cross.docker | 1 # THIS FILE WAS AUTO-GENERATED 3 # $ lcitool dockerfile --layers all --cross-arch armv7l debian-12 qemu 5 # https://gitlab.com/libvirt/libvirt-ci 7 FROM docker.io/library/debian:12-slim 10 apt-get update && \ 11 apt-get install -y eatmydata && \ 12 eatmydata apt-get dist-upgrade -y && \ 13 eatmydata apt-get install --no-install-recommends -y \ 20 ca-certificates \ 25 exuberant-ctags \ [all …]
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H A D | debian-all-test-cross.docker | 2 # Docker all cross-compiler target (tests only) 7 # to build and run linux-user tests on GitLab 9 FROM docker.io/library/debian:12-slim 11 # Duplicate deb line as deb-src 12 RUN sed -in "s/Types: deb/Types: deb deb-src/g" /etc/apt/sources.list.d/debian.sources 15 apt-get update && \ 16 apt-get install -y eatmydata && \ 17 eatmydata apt-get dist-upgrade -y && \ 18 apt build-dep -yy qemu 22 apt install -y --no-install-recommends \ [all …]
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/qemu/docs/system/arm/ |
H A D | orangepi.rst | 1 Orange Pi PC (``orangepi-pc``) 5 based embedded computer with mainline support in both U-Boot 6 and Linux. The board comes with a Quad Core Cortex-A7 @ 1.3GHz, 15 * SMP (Quad Core Cortex-A7) 20 * Timer device (re-used from Allwinner A10) 36 - Graphical output via HDMI, GPU and/or the Display Engine 37 - Audio output 38 - Hardware Watchdog 41 for a complete list of unimplemented I/O devices: ``./hw/arm/allwinner-h3.c`` 46 The Orange Pi PC machine can start using the standard -kernel functionality [all …]
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H A D | xlnx-versal-virt.rst | 1 Xilinx Versal Virt (``xlnx-versal-virt``) 4 Xilinx Versal is a family of heterogeneous multi-core SoCs 10 https://www.xilinx.com/products/silicon-devices/acap/versal.html 22 - 2 ACPUs (ARM Cortex-A72) 26 - Interrupt controller (ARM GICv3) 27 - 2 UARTs (ARM PL011) 28 - An RTC (Versal built-in) 29 - 2 GEMs (Cadence MACB Ethernet MACs) 30 - 8 ADMA (Xilinx zDMA) channels 31 - 2 SD Controllers [all …]
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H A D | bananapi_m2u.rst | 1 Banana Pi BPI-M2U (``bpim2u``) 4 Banana Pi BPI-M2 Ultra is a quad-core mini single board computer built with 6 has onboard WiFi and BT. On the ports side, the BPI-M2 Ultra has 2 USB A 15 * SMP (Quad Core Cortex-A7) 19 * Timer device (re-used from Allwinner A10) 35 - Graphical output via HDMI, GPU and/or the Display Engine 36 - Audio output 37 - Real Time Clock 40 for a complete list of unimplemented I/O devices: ``./hw/arm/allwinner-r40.c`` 45 The Banana Pi M2U machine can start using the standard -kernel functionality [all …]
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H A D | sabrelite.rst | 4 Boundary Devices SABRE Lite i.MX6 Development Board is a low-cost development 9 ----------------- 13 * Up to 4 Cortex-A9 cores 34 ------------ 36 The SABRE Lite machine can start using the standard -kernel functionality 37 for loading a Linux kernel, U-Boot bootloader or ELF executable. 39 Running Linux kernel 40 -------------------- 42 Linux mainline v5.10 release is tested at the time of writing. To build a Linux 46 .. code-block:: bash [all …]
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/qemu/scripts/ |
H A D | update-syscalltbl.sh | 2 arch/alpha/kernel/syscalls/syscall.tbl,linux-user/alpha/syscall.tbl \ 3 arch/arm/tools/syscall.tbl,linux-user/arm/syscall.tbl \ 4 scripts/syscall.tbl,linux-user/aarch64/syscall_64.tbl \ 5 scripts/syscall.tbl,linux-user/hexagon/syscall.tbl \ 6 scripts/syscall.tbl,linux-user/loongarch64/syscall.tbl \ 7 arch/m68k/kernel/syscalls/syscall.tbl,linux-user/m68k/syscall.tbl \ 8 arch/microblaze/kernel/syscalls/syscall.tbl,linux-user/microblaze/syscall.tbl \ 9 arch/mips/kernel/syscalls/syscall_n32.tbl,linux-user/mips64/syscall_n32.tbl \ 10 arch/mips/kernel/syscalls/syscall_n64.tbl,linux-user/mips64/syscall_n64.tbl \ 11 arch/mips/kernel/syscalls/syscall_o32.tbl,linux-user/mips/syscall_o32.tbl \ [all …]
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/qemu/docs/user/ |
H A D | main.rst | 1 .. _user-mode: 3 QEMU User space emulator 7 --------------------------- 9 The following OS are supported in user space emulation: 11 - Linux (referred as qemu-linux-user) 13 - BSD (referred as qemu-bsd-user) 16 -------- 18 QEMU user space emulation has the following notable features: 23 32/64-bit mismatches between hosts and targets. IOCTLs can be 33 for example to emulate the signal mask. On Linux, QEMU supports both [all …]
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/qemu/ |
H A D | MAINTAINERS | 10 consult qemu-devel and not any specific individual privately. 23 W: Web-page with status/info 59 ------------------------------ 63 L: qemu-devel@nongnu.org 72 R: Philippe Mathieu-Daudé <philmd@linaro.org> 75 F: docs/devel/build-environment.rst 76 F: docs/devel/code-of-conduct.rst 78 F: docs/devel/conflict-resolution.rst 80 F: docs/devel/submitting-a-patch.rst 81 F: docs/devel/submitting-a-pull-request.rst [all …]
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H A D | configure | 14 source_path=$(cd "$(dirname -- "$0")"; pwd) 16 if test "$PWD" -ef "$source_path" 20 MARKER=build/auto-created-by-configure 22 if test -e build 24 if test -f $MARKER 26 rm -rf build 36 echo "your source directory, or try doing an out-of-tree build." 41 # This file is auto-generated by configure to support in-source tree 46 @$(MAKE) -C build -f Makefile $(MAKECMDGOALS) 48 test -e build/auto-created-by-configure ; \ [all …]
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/qemu/linux-user/ |
H A D | semihost.c | 2 * ARM Compatible Semihosting Console Support. 6 * Currently ARM and RISC-V are unique in having support for 7 * semihosting support in linux-user. So for now we implement the 8 * common console API but just for arm and risc-v linux-user. 10 * SPDX-License-Identifier: GPL-2.0-or-later 16 #include "user-internals.h" 20 * For linux-user we can safely block. However as we want to return as 31 /* Disable line-buffering and echo */ in qemu_semihosting_console_read()
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H A D | uname.c | 23 #include "user-internals.h" 29 * on ARM it has all features turned on, so there is no perfect arch string to 35 /* utsname machine name on linux arm is CPU arch name + endianness, e.g. in cpu_to_uname_machine() 36 * armv7l; to get a list of CPU arch names from the linux source, use: in cpu_to_uname_machine() 37 * grep arch_name: -A1 linux/arch/arm/mm/proc-*.S in cpu_to_uname_machine() 38 * see arch/arm/kernel/setup.c: setup_processor() in cpu_to_uname_machine() 41 /* in theory, endianness is configurable on some ARM CPUs, but this isn't in cpu_to_uname_machine() 42 * used in user mode emulation */ in cpu_to_uname_machine() 67 /* default is #define-d in each arch/ subdir */ in cpu_to_uname_machine() 76 (dest)[sizeof(dest) - 1] = '\0'; \ [all …]
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/qemu/tests/lcitool/ |
H A D | refresh | 3 # Re-generate container recipes 7 # https://gitlab.com/libvirt/libvirt-ci 13 # the top-level directory. 28 lcitool_path = Path(self_dir, "libvirt-ci", "bin", "lcitool") 30 lcitool_cmd = [lcitool_path, "--data-dir", self_dir] 56 # Optional user setting, this will always be the last thing added 59 "# As a final step configure the user (if env is defined)", 60 "ARG USER", 62 "RUN if [ \"${USER}\" ]; then \\", 63 " id ${USER} 2>/dev/null || useradd -u ${UID} -U ${USER}; fi\n" [all …]
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/qemu/linux-user/arm/ |
H A D | Makefile.vdso | 1 include $(BUILD_DIR)/tests/tcg/arm-linux-user/config-target.mak 3 SUBDIR = $(SRC_PATH)/linux-user/arm 6 all: $(SUBDIR)/vdso-be8.so $(SUBDIR)/vdso-be32.so $(SUBDIR)/vdso-le.so 8 # Adding -use-blx disables unneeded interworking without actually using blx. 9 LDFLAGS = -nostdlib -shared -Wl,-use-blx -Wl,-z,max-page-size=4096 \ 10 -Wl,-h,linux-vdso.so.1 -Wl,--build-id=sha1 \ 11 -Wl,--hash-style=both -Wl,-T,$(SUBDIR)/vdso.ld 13 $(SUBDIR)/vdso-be8.so: vdso.S vdso.ld vdso-asmoffset.h 14 $(CC) -o $@ $(LDFLAGS) -mbig-endian -mbe8 $< 16 $(SUBDIR)/vdso-be32.so: vdso.S vdso.ld vdso-asmoffset.h [all …]
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H A D | target_cpu.h | 2 * ARM specific CPU ABI and functions for linux-user 26 if (arm_feature(&cpu->env, ARM_FEATURE_M)) { in arm_max_reserved_va() 29 * and in general a lot of M-profile system stuff in in arm_max_reserved_va() 30 * the high addresses. Restrict linux-user to the in arm_max_reserved_va() 31 * cached write-back RAM in the system map. in arm_max_reserved_va() 37 * See init_guest_commpage in linux-user/elfload.c. in arm_max_reserved_va() 48 env->regs[13] = newsp; in cpu_clone_regs_child() 50 env->regs[0] = 0; in cpu_clone_regs_child() 60 env->cp15.tpidruro_s = newtls; in cpu_set_tls() 62 env->cp15.tpidrro_el[0] = newtls; in cpu_set_tls() [all …]
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H A D | cpu_loop.c | 2 * qemu user cpu loop 4 * Copyright (c) 2003-2008 Fabrice Bellard 22 #include "user-internals.h" 24 #include "user/cpu_loop.h" 25 #include "signal-common.h" 26 #include "semihosting/common-semi.h" 27 #include "exec/page-protection.h" 28 #include "exec/mmap-lock.h" 29 #include "user/page-protection.h" 30 #include "target/arm/syndrome.h" [all …]
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/qemu/docs/system/ |
H A D | introduction.rst | 7 --------------------------- 14 .. list-table:: Supported Accelerators 15 :header-rows: 1 17 * - Accelerator 18 - Host OS 19 - Host Architectures 20 * - KVM 21 - Linux 22 - Arm (64 bit only), MIPS, PPC, RISC-V, s390x, x86 23 * - Xen [all …]
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/qemu/docs/about/ |
H A D | emulation.rst | 6 :ref:`System Emulation` and :ref:`User Mode Emulation` are supported 9 .. list-table:: Supported Guest Architectures for Emulation 11 :header-rows: 1 13 * - Architecture (qemu name) 14 - System 15 - User 16 - Notes 17 * - Alpha 18 - Yes 19 - Yes [all …]
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/qemu/tcg/tci/ |
H A D | README | 1 TCG Interpreter (TCI) - Copyright (c) 2011 Stefan Weil. 12 QEMU can create native code for some hosts (arm, i386, ia64, ppc, ppc64, 24 tcg-target.c.inc, tcg-target.h. Both files are in directory tcg/tci. 30 to six arguments packed into a 32-bit integer. See comments in tci.c 37 configure --enable-tcg-interpreter 39 If configure is called without --enable-tcg-interpreter, it will 46 configure --enable-tcg-interpreter 52 qemu-system-i386 -d in_asm,op_opt,cpu -D /tmp/qemu.log -accel tcg,one-insn-per-tb=on 61 configure --cpu=unknown --enable-tcg-interpreter 64 user mode emulation. [all …]
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/qemu/.gitlab-ci.d/ |
H A D | crossbuilds.yml | 2 - local: '/.gitlab-ci.d/crossbuild-template.yml' 4 cross-armhf-user: 7 job: armhf-debian-cross-container 9 IMAGE: debian-armhf-cross 11 cross-arm64-system: 14 job: arm64-debian-cross-container 16 IMAGE: debian-arm64-cross 18 cross-arm64-user: 21 job: arm64-debian-cross-container 23 IMAGE: debian-arm64-cross [all …]
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H A D | buildtest.yml | 2 - local: '/.gitlab-ci.d/buildtest-template.yml' 4 build-system-alpine: 6 - .native_build_job_template 7 - .native_build_artifact_template 9 - job: amd64-alpine-container 12 TARGETS: avr-softmmu loongarch64-softmmu mips64-softmmu mipsel-softmmu 13 MAKE_CHECK_ARGS: check-build 14 CONFIGURE_ARGS: --enable-docs --enable-trace-backends=log,simple,syslog 16 check-system-alpine: 19 - job: build-system-alpine [all …]
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H A D | crossbuild-template.yml | 7 - ccache 12 - source scripts/ci/gitlab-ci-section 13 - section_start setup "Pre-script setup" 14 - JOBS=$(expr $(nproc) + 1) 15 - cat /packages.txt 16 - section_end setup 18 - export CCACHE_BASEDIR="$(pwd)" 19 - export CCACHE_DIR="$CCACHE_BASEDIR/ccache" 20 - export CCACHE_MAXSIZE="500M" 21 - export PATH="$CCACHE_WRAPPERSDIR:$PATH" [all …]
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/qemu/docs/devel/ |
H A D | multi-thread-tcg.rst | 2 Copyright (c) 2015-2020 Linaro Ltd. 5 later. See the COPYING file in the top-level directory. 10 Multi-threaded TCG 13 This document outlines the design for multi-threaded TCG (a.k.a MTTCG) 14 system-mode emulation. user-mode emulation has always mirrored the 17 linux-user emulation. 19 The original system-mode TCG implementation was single threaded and 20 dealt with multiple CPUs with simple round-robin scheduling. This 22 being emulated gained additional cores and per-core performance gains 29 user-space thread. This is enabled by default for all FE/BE [all …]
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/qemu/tests/functional/ |
H A D | test_arm_cubieboard.py | 3 # Functional test that boots a Linux kernel and checks the console 5 # SPDX-License-Identifier: GPL-2.0-or-later 16 ('https://apt.armbian.com/pool/main/l/linux-6.6.16/' 17 …'linux-image-current-sunxi_24.2.1_armhf__6.6.16-Seb3e-D6b4a-P2359-Ce96bHfe66-HK01ba-V014b-B067e-R4… 21 ('https://github.com/groeck/linux-build-test/raw/' 23 'arm/rootfs-armv5.cpio.gz'), 27 ('https://github.com/groeck/linux-build-test/raw/' 29 'arm/rootfs-armv5.ext2.gz'), 34 'openwrt-22.03.2-sunxi-cortexa8-cubietech_a10-cubieboard-ext4-sdcard.img.gz'), 40 self.ASSET_DEB, member='boot/vmlinuz-6.6.16-current-sunxi') [all …]
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/qemu/bsd-user/arm/ |
H A D | signal.c | 2 * arm signal functions 24 * Compare to arm/arm/machdep.c sendsig() 40 * lr = sigtramp at base of user stack in set_sigtramp_args() 43 env->regs[0] = sig; in set_sigtramp_args() 44 env->regs[1] = frame_addr + in set_sigtramp_args() 46 env->regs[2] = frame_addr + in set_sigtramp_args() 50 env->regs[5] = frame_addr + in set_sigtramp_args() 52 env->regs[TARGET_REG_PC] = ka->_sa_handler & ~1; in set_sigtramp_args() 53 env->regs[TARGET_REG_SP] = frame_addr; in set_sigtramp_args() 54 env->regs[TARGET_REG_LR] = TARGET_PS_STRINGS - TARGET_SZSIGCODE; in set_sigtramp_args() [all …]
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