#
f9bb7e53 |
| 09-May-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'hw-misc-20250508' of https://github.com/philmd/qemu into staging
Misc HW patches
- Allow using plugins on BSD user-emulation - Inline VMSTATE_CPU() macro - Fix header includes for HVF x8
Merge tag 'hw-misc-20250508' of https://github.com/philmd/qemu into staging
Misc HW patches
- Allow using plugins on BSD user-emulation - Inline VMSTATE_CPU() macro - Fix header includes for HVF x86 - Build hw/hyperv/ files once - Various typo fixed - Fix issue in i.MX I2C model
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmgco7IACgkQ4+MsLN6t # wN5b/RAAvI+0Fyo/QNTjUQKBsFT7M9DY2bv2rxElG5+gwQvrqRkwV4POjJ42TFbl # NazNnywIW2eZvjQ1W3pBceiAhXAOxRi/zSTRO30uhL0DFmfAIEF6aMZdVZKg01mq # U/x5WF3WM8taXYE5V8kgV+Rr6b02SMGgtUcNVTnDjVdmRI0+ByPf122IwniKffhR # kJhPj4tgU/wBsOisgPTAr1kbQePyvbvckxKc1kt73jPRV6fUtVV14qcrBN6zECV3 # +uFit6Q/zYH21XpFdq/3X9lEjMZNGI6zBZ939/x5Bpj53MjmYovYY81987ioAB7S # zsmFZ2Nl7L/8l/jKrhKPS+l71OzmLI1dMzr2CrOxgMhXxfItta9y04CLDf7ZXSf6 # mgDE3rA89C33dzoGnb4axphmcposyM/u0lLhGgnMh3GFv84P6/DqgxKZv8vj6OMq # U/DhHPw507W/JAg8ge/5YchVJwxKfBbHm0y7NLqH1IGmoyyqsMQo6DbC9/zTK7T4 # dAZdcrm2dBbSxYaL5J8gTGPo/QjVG9BaU9EvKIcZf181QSHg//QCYB6iN5Phx5hO # KH9hUTmpqA4Lza0XGGUM1c43/24Dq/i1I0EncW4zqFqaf9l9M06i5cdQrU+myzAs # O/dLsFlm7WAJLDkt2Ax2peYKHVKpGywFRsCR04uulkoLoD5nd/w= # =1VOP # -----END PGP SIGNATURE----- # gpg: Signature made Thu 08 May 2025 08:29:38 EDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'hw-misc-20250508' of https://github.com/philmd/qemu: hw/i2c/imx: Always set interrupt status bit if interrupt condition occurs hw/i386/acpi-build: Fix typo and grammar in comment hw/i386/acpi-build: Update document reference hw/i386/acpi-build: Fix build_append_notfication_callback typo hw/acpi/ged: Fix wrong identation hw/pci/pcie_port: Fix pcie_slot_is_hotpluggbale_bus typo hw/hyperv/hyperv: common compilation unit hw/hyperv/hyperv_testdev: common compilation unit hw/hyperv/balloon: common balloon compilation units hw/hyperv/syndbg: common compilation unit hw/hyperv/vmbus: common compilation unit hw/hyperv/hyperv.h: header cleanup hw/hyperv/hv-balloon-stub: common compilation unit system/hvf: Expose hvf_enabled() to common code system/hvf: Avoid including 'cpu.h' accel/hvf: Include missing 'hw/core/cpu.h' header target/migration: Inline VMSTATE_CPU() qom: Factor qom_resolve_path() out bsd-user: add option to enable plugins
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
962f9f18 |
| 03-Apr-2025 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
system/hvf: Expose hvf_enabled() to common code
Currently hvf_enabled() is restricted to target-specific code. By defining CONFIG_HVF_IS_POSSIBLE we allow its use anywhere.
Signed-off-by: Philippe
system/hvf: Expose hvf_enabled() to common code
Currently hvf_enabled() is restricted to target-specific code. By defining CONFIG_HVF_IS_POSSIBLE we allow its use anywhere.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20250403235821.9909-28-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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#
c5f122fd |
| 07-May-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* ci: enable RISC-V cross jobs * rust: bump minimum supported version to 1.77 * rust: enable uninlined_format_args lint * ini
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* ci: enable RISC-V cross jobs * rust: bump minimum supported version to 1.77 * rust: enable uninlined_format_args lint * initial Emscripten support * small fixes
# -----BEGIN PGP SIGNATURE----- # # iQFIBAABCgAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmgaFq8UHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroOxAAf/YPKw5KAoE5SwUqJ0oSOMHrU0w4jc # A2Qiw1uziA6kDmUMUXwWR7Qbd8V7jtihGrgTrIPopeavgWWQeNsBHjN4WxHRI7aq # +429rjzFo9V9tSfgp6UcLQSk/9kC4ygEwPnesHpKd27fS6z9Wg4AQkj1iFipR179 # wC3fqwOqqWZSjfUd7wjo7McFYZgL5j/cxmFXePh8+fdT+6PUKdG9nRW86KUPDZ+A # 8HxcuOW7GZd+LhnYUhi7vlLFo/RgVsGQWj0Q4BDJvUkKa13t9UUCGff7uQP2AC3v # ny0gWDcmbWY1L/QXyNzhgd44X4LAjCmpnonlYnrdZizEmhv3aByd+fANgw== # =uIJK # -----END PGP SIGNATURE----- # gpg: Signature made Tue 06 May 2025 10:03:27 EDT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (30 commits) gitlab: Enable CI for wasm build tests: Add Dockerfile containing dependencies for Emscripten build meson: Add wasm build in build scripts util: Add coroutine backend for emscripten util: exclude mmap-alloc.c from compilation target on Emscripten Disable options unsupported on Emscripten include/qemu/osdep.h: Add Emscripten-specific OS dependencies block: Fix type conflict of the copy_file_range stub block: Add including of ioctl header for Emscripten build util/cacheflush.c: Update cache flushing mechanism for Emscripten include/glib-compat.h: Poison g_list_sort and g_slist_sort target/s390x: Fix type conflict of GLib function pointers target/ppc: Fix type conflict of GLib function pointers target/i386/cpu.c: Fix type conflict of GLib function pointers target/arm/helper.c: Fix type conflict of GLib function pointers docs: build-system: fix typo ci: run RISC-V cross jobs by default rust: clippy: enable uninlined_format_args lint target/i386/emulate: fix target_ulong format strings docs: rust: update for newer minimum supported version ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
8574be0e |
| 28-Apr-2025 |
Kohei Tokunaga <ktokunaga.mail@gmail.com> |
tests: Add Dockerfile containing dependencies for Emscripten build
The added Dockerfile is based on the emsdk image, which includes the Emscripten toolchain. It also cross-compiles the necessary dep
tests: Add Dockerfile containing dependencies for Emscripten build
The added Dockerfile is based on the emsdk image, which includes the Emscripten toolchain. It also cross-compiles the necessary dependencies (glib, libffi, pixman, and zlib) for the Emscripten target environment.
Signed-off-by: Kohei Tokunaga <ktokunaga.mail@gmail.com> Link: https://lore.kernel.org/r/8bed6e9d46ef09328a87320928b5dec575d1e435.1745820062.git.ktokunaga.mail@gmail.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
ccc403ed |
| 28-Apr-2025 |
Kohei Tokunaga <ktokunaga.mail@gmail.com> |
meson: Add wasm build in build scripts
has_int128_type is set to false on emscripten as of now to avoid errors by libffi. Tests are disabled on emscripten because they rely on host features that are
meson: Add wasm build in build scripts
has_int128_type is set to false on emscripten as of now to avoid errors by libffi. Tests are disabled on emscripten because they rely on host features that aren't supported by emscripten (e.g. fork and unix socket).
Signed-off-by: Kohei Tokunaga <ktokunaga.mail@gmail.com> Link: https://lore.kernel.org/r/ad03b3b180335f59e785e930968077bf15c46260.1745820062.git.ktokunaga.mail@gmail.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
5b78d120 |
| 28-Apr-2025 |
Kohei Tokunaga <ktokunaga.mail@gmail.com> |
util: Add coroutine backend for emscripten
Emscripten does not support couroutine methods currently used by QEMU but provides a coroutine implementation called "fiber". This commit introduces a coro
util: Add coroutine backend for emscripten
Emscripten does not support couroutine methods currently used by QEMU but provides a coroutine implementation called "fiber". This commit introduces a coroutine backend using fiber. Note that fiber does not support submitting coroutines to other threads.
Signed-off-by: Kohei Tokunaga <ktokunaga.mail@gmail.com> Acked-by: Stefan Hajnoczi <stefanha@redhat.com> Link: https://lore.kernel.org/r/006b683fd578ed6303a2dc8679094da9a7e6dfb4.1745820062.git.ktokunaga.mail@gmail.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
0f46bf65 |
| 28-Apr-2025 |
Kohei Tokunaga <ktokunaga.mail@gmail.com> |
include/qemu/osdep.h: Add Emscripten-specific OS dependencies
On emscripten, some implementations in os-posix.c can't be used such as daemonizing and changing user. This commit introduces os-wasm.c
include/qemu/osdep.h: Add Emscripten-specific OS dependencies
On emscripten, some implementations in os-posix.c can't be used such as daemonizing and changing user. This commit introduces os-wasm.c and os-wasm.h which are forked from os-posix.c and os-posix.h and patched for targetting Emscripten.
Signed-off-by: Kohei Tokunaga <ktokunaga.mail@gmail.com> Link: https://lore.kernel.org/r/9fc7b106ecf86675b4532bd6778b7b5945442f89.1745820062.git.ktokunaga.mail@gmail.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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#
57b6f8d0 |
| 07-May-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-target-arm-20250506' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * hw/arm/npcm8xx_boards: Correct valid_cpu_types setting of NPCM8XX SoC * arm
Merge tag 'pull-target-arm-20250506' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * hw/arm/npcm8xx_boards: Correct valid_cpu_types setting of NPCM8XX SoC * arm/hvf: fix crashes when using gdbstub * target/arm/ptw: fix arm_cpu_get_phys_page_attrs_debug * hw/arm/virt: Remove deprecated old versions of 'virt' machine * tests/functional: Add test for imx8mp-evk board with USDHC coverage * hw/arm: Attach PSPI module to NPCM8XX SoC * target/arm: Don't assert() for ISB/SB inside IT block * docs: Don't define duplicate label in qemu-block-drivers.rst.inc * target/arm/kvm: Drop support for kernels without KVM_ARM_PREFERRED_TARGET * hw/pci-host/designware: Fix viewport configuration * hw/gpio/imx_gpio: Fix interpretation of GDIR polarity
# -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmgaH50ZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3l4ED/0QOV6oev1ILqA1INBjY7Ct # VrjzjsynFnUkyU0MLKyuK+mBRYmeR1OWtIRTkbgIsRA23XqV4de/BhGsVCGrRA0r # VS/hV2kTQM0GYU2dCr9LpOC3jX0dDzft5uW9GjW/sW9infAwXRwKhGgkIV6q/G5V # Y6cMN7UXrOnomF8Spk5VvK8HH9OHV/fuSlWenk9X1bXPpVQ3jymqZ1eRSDXOzDdM # uP6lVdI3oHCpRPeXKa1EA8cfQa9M/y9XSzDIrF8OTZKVcIzbX8/XR+y74e4UMIvK # DD3nAuAXcezy3286Pu7OfciRBJfq3eFHZVXOKfQWFI3MStPmexKqoHm8JtQxXJOT # uJdaugItLahlPtNk41nAydYzYimK/MBKCWAfTqecEhZ9Cd64jeOPM9zXwRkXwyuu # n9XQUhm5Ll22urd4q2M8cCxKBP2OoaEBFS4Hn9uDpVDcWpRMLe2DP7ywzZjdLU9b # jLSlana5+wpMuwIasXlNzWgT37RA+xlDE2Snaz7K/Z3JV/XNZAZD6WXV72zTzhFs # EI10edHI+JXXlbT1Ev/yVv4cN9h/Kr3hyoOKat2ySaomW26H27wNPuvPTto4rCYU # 6VQJmJvwPSBWELI5eRbcN269K0ar1UXUsvDsy97cq35me3gFvfAZFksLpnPWKef6 # pvwwPuxLWQXs+chepuQyXA== # =c21p # -----END PGP SIGNATURE----- # gpg: Signature made Tue 06 May 2025 10:41:33 EDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20250506' of https://git.linaro.org/people/pmaydell/qemu-arm: (32 commits) hw/arm/virt: Remove deprecated virt-4.0 machine hw/arm/virt: Remove deprecated virt-3.1 machine hw/arm/virt: Remove deprecated virt-3.0 machine hw/arm/virt: Update comment about Multiprocessor Affinity Register hw/gpio/imx_gpio: Fix interpretation of GDIR polarity hw/pci-host/designware: Fix viewport configuration hw/pci-host/designware: Remove unused include target/arm/kvm: Drop support for kernels without KVM_ARM_PREFERRED_TARGET docs: Don't define duplicate label in qemu-block-drivers.rst.inc target/arm: Don't assert() for ISB/SB inside IT block hw/arm: Attach PSPI module to NPCM8XX SoC tests/functional: Add test for imx8mp-evk board with USDHC coverage hw/arm/virt: Remove VirtMachineClass::no_highmem_ecam field hw/arm/virt: Remove deprecated virt-2.12 machine hw/arm/virt: Remove VirtMachineClass::smbios_old_sys_ver field hw/arm/virt: Remove deprecated virt-2.11 machine hw/arm/virt: Remove deprecated virt-2.10 machine hw/arm/virt: Remove deprecated virt-2.9 machine hw/arm/virt: Remove VirtMachineClass::claim_edge_triggered_timers field hw/arm/virt: Remove deprecated virt-2.8 machine ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
7cef6d68 |
| 06-May-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-tcg-20250501-v2' of https://gitlab.com/rth7680/qemu into staging
include: Remove 'exec/exec-all.h' accel/tcg: Build tb-maint.c twice accel/tcg: Build cpu-exec.c twice accel/tcg: Buil
Merge tag 'pull-tcg-20250501-v2' of https://gitlab.com/rth7680/qemu into staging
include: Remove 'exec/exec-all.h' accel/tcg: Build tb-maint.c twice accel/tcg: Build cpu-exec.c twice accel/tcg: Build translate-all.c twice accel/tcg: Build tcg-all.c twice accel/tcg: Build cputlb.c once accel/tcg: Build user-exec.c once
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmgZFdYdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/8RAf8C2NTtUNlBrjtPrQD # hP2YiNVfI+c9e3x3Bivx++9YUYfynWyPO774axnyhqYg3cJONWs+4HJ/MQHNSG/G # qT+7EihGIDwnjWxTvu9wp5XucvaGKBqGEQ2IZrr0JBEnvrrpuhiauqP7Bjb37eAj # kxw50NUxxz4wqk5Ql4UZyJ0h1peH5PFNr9uozhr6HJSEET7GxPMfUy611jAa/eXc # MDkiDwd+0JGSKkMSQaCocMO2vL4OQGr3sTBNHQZ/RalEdMp+AJiQgjJ0fFfCInwK # 4w8/8we8MKUBIwTn5kTUBjPrI7nlhJk5mFm5aV7fNvSClGf5Yb62SfPesQKm5qkE # z3aApA== # =Lpyu # -----END PGP SIGNATURE----- # gpg: Signature made Mon 05 May 2025 15:47:34 EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20250501-v2' of https://gitlab.com/rth7680/qemu: (59 commits) accel/tcg: Build user-exec.c once accel/tcg: Avoid abi_ptr in user-exec.c accel/tcg: Remove TARGET_PAGE_DATA_SIZE accel/tcg: Move TARGET_TAGGED_ADDRESSES to TCGCPUOps.untagged_addr include/user: Use vaddr in guest-host.h include/user: Convert GUEST_ADDR_MAX to a variable accel/tcg: Build cputlb.c once accel/tcg: Use vaddr for plugin_{load,store}_cb accel/tcg: Use target_long_bits() in cputlb.c accel/tcg: Move tlb_vaddr_to_host declaration to probe.h accel/tcg: Move user-only tlb_vaddr_to_host out of line accel/tcg: Use vaddr in cpu_loop.h accel/tcg: Build tcg-all.c twice accel/tcg: Build translate-all.c twice accel/tcg: Use target_long_bits() in translate-all.c accel/tcg: Don't use TARGET_LONG_BITS in decode_sleb128 tcg: Define INSN_START_WORDS as constant 3 qemu: Introduce target_long_bits() qemu/target_info: Add %target_cpu_type field to TargetInfo system/vl: Filter machine list available for a particular target binary ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
cef2274d |
| 09-Apr-2025 |
Bernhard Beschow <shentey@gmail.com> |
tests/functional: Add test for imx8mp-evk board with USDHC coverage
Introduce a functional test which boots Debian 12 on the imx8mp-evk board. Since the root filesystem resides on an SD card, the te
tests/functional: Add test for imx8mp-evk board with USDHC coverage
Introduce a functional test which boots Debian 12 on the imx8mp-evk board. Since the root filesystem resides on an SD card, the test also verifies the basic operation of the USDHC.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20250409202630.19667-1-shentey@gmail.com [PMM: added extra blank line as suggested by thuth; set timeout to 240s] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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6d0d9add |
| 05-May-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-aspeed-20250505' of https://github.com/legoater/qemu into staging
aspeed queue:
* Fixed AST2700 SPI model issues * Updated SDK images * Added FW support to the AST2700 EVB machines
Merge tag 'pull-aspeed-20250505' of https://github.com/legoater/qemu into staging
aspeed queue:
* Fixed AST2700 SPI model issues * Updated SDK images * Added FW support to the AST2700 EVB machines * Introduced an AST27x0 multi-SoC machine
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmgYf0sACgkQUaNDx8/7 # 7KGYGxAAokBF+jSjl7DgDbpkKu0RhJeV02rUPXIDehyBW+NcjL3xcG8f36wraZ4+ # SYGESnWCymKlQi9ZYdqIQ86w4WSNDQ1s1pjefcvqEFBTCny1TRwNgocBQkdBcNhb # 1iIBpOu5c8j6i83U73W46OXwPBopXI2OzcxvX0lclOze3+qzHT6CDYgezXoNlJtG # RSJjeFO9sEghPgXzkBMrCotV4n7pDGeSpB9nSFfkzRekEbq3rzT6s6JxS1pylzut # g6YU6YqFl+RrR/5HRo5hIFE+YmqDvTpYnd8k5sJq9CxYSIXMkJImxssvg2oO5aoF # BVv/XxWVJ/oDEorXg5qNaRHzVk3StEX42boDQgj+dWsp1Q/4jdokrgFu7KSUT22q # mp4Px+Z5xlX5z6TNwp6yvb9Wobr23KjgXRqqqqLEftYrqaI6Nr/vcKjZZ438GzCd # SpKXxIAlXci1bAaDUTdfQnJyKe+ltJ7wOX1auQFqpI0CYe5Jcu3En6M799ne9azy # TvfMq0GN1oGNJoYRRmH51gNF0vlnDsDhDHod6i6ZmBFWGnMOtbti3nnEaAdk7JWB # pueux79YdE+f1q7SuA2X2OEchFxE/kA0B6SxP+IwXEcDyGNfZ6UJWoZGB9amc090 # pTQB1HHOGDEkYsReely1isTDCoZBqzDUreEhPssO0E9Pb/ZfeCE= # =vBwk # -----END PGP SIGNATURE----- # gpg: Signature made Mon 05 May 2025 05:05:15 EDT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full] # gpg: aka "Cédric Le Goater <clg@kaod.org>" [full] # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1
* tag 'pull-aspeed-20250505' of https://github.com/legoater/qemu: (24 commits) docs: Add support for ast2700fc machine tests/function/aspeed: Add functional test for ast2700fc hw/arm: Introduce ASPEED AST2700 A1 full core machine hw/arm/aspeed_ast27x0-tsp: Introduce AST27x0 A1 TSP SoC hw/arm/aspeed_ast27x0-ssp: Introduce AST27x0 A1 SSP SoC hw/intc/aspeed: Add support for AST2700 TSP INTC hw/intc/aspeed: Add support for AST2700 SSP INTC aspeed: ast27x0: Correct hex notation for device addresses aspeed: ast27x0: Map unimplemented devices in SoC memory docs/system/arm/aspeed: Support vbootrom for AST2700 docs/system/arm/aspeed: move AST2700 content to new section tests/functional/aspeed: Add to test vbootrom for AST2700 hw/arm/aspeed: Add support for loading vbootrom image via "-bios" hw/arm/aspeed_ast27x0 Introduce vbootrom memory region tests/functional/aspeed: extract boot and login sequence into helper function tests/functional/aspeed: Update test ASPEED SDK v09.06 tests/functional/aspeed: Move I2C test into shared helper for AST2700 reuse hw/arm/aspeed_ast27x0: Rename variable sram_name to name in ast2700 realize tests/functional/aspeed: Update test ASPEED SDK v03.00 for AST1030 tests/functional/aspeed: Update test ASPEED SDK v09.06 for AST2600 ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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b6f56826 |
| 05-May-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'migration-20250502-pull-request' of https://gitlab.com/peterx/qemu into staging
Migration pull request
- Prasad's few pre-requisite patches from multifd+postcopy enablement series - Mark
Merge tag 'migration-20250502-pull-request' of https://gitlab.com/peterx/qemu into staging
Migration pull request
- Prasad's few pre-requisite patches from multifd+postcopy enablement series - Markus's fix on a latent bug for tls_authz setup - Zhijian's latest RDMA series (includes the rdma soft-RoCE unit test) - Jack's RDMA migration patch to re-enable ipv6 - Thomas's vmstate static checker update on rename field in acpi/ghes - Peter's postcopy preempt optimization for locality hint
# -----BEGIN PGP SIGNATURE----- # # iIgEABYKADAWIQS5GE3CDMRX2s990ak7X8zN86vXBgUCaBT1DBIccGV0ZXJ4QHJl # ZGhhdC5jb20ACgkQO1/MzfOr1wbp5QD8DIxndg/ssr2s+jb4T3tLHj5887FqH9P3 # vU8aoppi4dkA/iYifF8eK+jmhh4yEAP+/NzbmDy+kLO7uEAJDIK+Z/UM # =Ae6/ # -----END PGP SIGNATURE----- # gpg: Signature made Fri 02 May 2025 12:38:36 EDT # gpg: using EDDSA key B9184DC20CC457DACF7DD1A93B5FCCCDF3ABD706 # gpg: issuer "peterx@redhat.com" # gpg: Good signature from "Peter Xu <xzpeter@gmail.com>" [full] # gpg: aka "Peter Xu <peterx@redhat.com>" [full] # Primary key fingerprint: B918 4DC2 0CC4 57DA CF7D D1A9 3B5F CCCD F3AB D706
* tag 'migration-20250502-pull-request' of https://gitlab.com/peterx/qemu: scripts/vmstate-static-checker.py: Allow new name for ghes_addr_le field migration/rdma: Remove qemu_rdma_broken_ipv6_kernel migration/postcopy: Spatial locality page hint for preempt mode tests/qtest/migration: consolidate set capabilities migration/ram: Implement save_postcopy_prepare() migration: Add save_postcopy_prepare() savevm handler migration: refactor channel discovery mechanism migration/multifd: move macros to multifd header migration: Fix latent bug in migrate_params_test_apply() migration: Add qtest for migration over RDMA migration: Unfold control_save_page() migration/rdma: Remove redundant migration_in_postcopy checks migration: disable RDMA + postcopy-ram migration: check RDMA and capabilities are compatible on both sides
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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7d9849c3 |
| 11-Mar-2025 |
Li Zhijian <lizhijian@fujitsu.com> |
migration: Add qtest for migration over RDMA
This qtest requires there is a RDMA(RoCE) link in the host. In order to make the test work smoothly, introduce a scripts/rdma-migration-helper.sh to dete
migration: Add qtest for migration over RDMA
This qtest requires there is a RDMA(RoCE) link in the host. In order to make the test work smoothly, introduce a scripts/rdma-migration-helper.sh to detect existing RoCE link before running the test.
Test will be skipped if there is no available RoCE link. # Start of rdma tests # Running /x86_64/migration/precopy/rdma/plain ok 1 /x86_64/migration/precopy/rdma/plain # SKIP No rdma link available # To enable the test: # Run 'scripts/rdma-migration-helper.sh setup' with root to setup a new rdma/rxe link and rerun the test # Optional: run 'scripts/rdma-migration-helper.sh clean' to revert the 'setup'
# End of rdma tests
Cc: Philippe Mathieu-Daudé <philmd@linaro.org> Cc: Stefan Hajnoczi <stefanha@gmail.com> Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Li Zhijian <lizhijian@fujitsu.com> Message-ID: <20250311024221.363421-1-lizhijian@fujitsu.com> [add 'head -1' to script, reformat test message] Signed-off-by: Fabiano Rosas <farosas@suse.de>
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e578dcc7 |
| 29-Apr-2025 |
Jamin Lin <jamin_lin@aspeedtech.com> |
pc-bios: Add AST27x0 vBootrom
The boot ROM is a minimal implementation designed to load an AST27x0 boot image. Its source code is available at: https://github.com/google/vbootrom Commit id: d6e33867
pc-bios: Add AST27x0 vBootrom
The boot ROM is a minimal implementation designed to load an AST27x0 boot image. Its source code is available at: https://github.com/google/vbootrom Commit id: d6e3386709b3e49322a94ffadc2aaab9944ab77b Build Information: ``` Build Date : Apr 29 2025 01:23:18 FW Version : git-d6e3386 ```
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Nabih Estefan <nabihestefan@google.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Tested-by: Nabih Estefan <nabihestefan@google.com> Link: https://lore.kernel.org/qemu-devel/20250429062822.1184920-2-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
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84307cd6 |
| 24-Apr-2025 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
include: Remove 'exec/exec-all.h'
"exec/exec-all.h" is now fully empty, let's remove it.
Mechanical change running:
$ sed -i '/exec\/exec-all.h/d' $(git grep -wl exec/exec-all.h)
Signed-off-by:
include: Remove 'exec/exec-all.h'
"exec/exec-all.h" is now fully empty, let's remove it.
Mechanical change running:
$ sed -i '/exec\/exec-all.h/d' $(git grep -wl exec/exec-all.h)
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250424202412.91612-14-philmd@linaro.org>
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f12b7177 |
| 24-Apr-2025 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
physmem: Restrict TCG IOTLB code to TCG accel
Restrict iotlb_to_section(), address_space_translate_for_iotlb() and memory_region_section_get_iotlb() to TCG. Declare them in the new "accel/tcg/iommu.
physmem: Restrict TCG IOTLB code to TCG accel
Restrict iotlb_to_section(), address_space_translate_for_iotlb() and memory_region_section_get_iotlb() to TCG. Declare them in the new "accel/tcg/iommu.h" header. Declare iotlb_to_section() using the MemoryRegionSection typedef.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250424202412.91612-12-philmd@linaro.org>
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06b40d25 |
| 27-Apr-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'single-binary-20250425' of https://github.com/philmd/qemu into staging
Various patches loosely related to single binary work:
- Replace cpu_list() definition by CPUClass::list_cpus() cal
Merge tag 'single-binary-20250425' of https://github.com/philmd/qemu into staging
Various patches loosely related to single binary work:
- Replace cpu_list() definition by CPUClass::list_cpus() callback - Remove few MO_TE definitions on Hexagon / X86 targets - Remove target_ulong uses in ARMMMUFaultInfo and ARM CPUWatchpoint - Remove DEVICE_HOST_ENDIAN definition - Evaluate TARGET_BIG_ENDIAN at compile time and use target_needs_bswap() more - Rename target_words_bigendian() as target_big_endian() - Convert target_name() and target_cpu_type() to TargetInfo API - Constify QOM TypeInfo class_data/interfaces fields - Get default_cpu_type calling machine_class_default_cpu_type() - Correct various uses of GLibCompareDataFunc prototype - Simplify ARM/Aarch64 gdb_get_core_xml_file() handling a bit - Move device tree files in their own pc-bios/dtb/ subdir - Correctly check strchrnul() symbol availability on macOS SDK - Move target-agnostic methods out of cpu-target.c and accel-target.c - Unmap canceled USB XHCI packet - Use deposit/extract API in designware model - Fix MIPS16e translation - Few missing header fixes
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmgLqb8ACgkQ4+MsLN6t # wN6nCQ//cmv1M+NsndhO5TAK8T1eUSXKlTZh932uro6ZgxKwN4p+j1Qo7bq3O9gu # qUMHNbcfQl8sHSytiXBoxCjLMCXC3u38iyz75WGXuPay06rs4wqmahqxL4tyno3l # 1RviFts9xlLn+tJqqrAR6+pRdALld0TY+yXUjXgr4aK5pIRpLz9U/sIEoh7qbA5U # x0MTaceDG3A91OYo0TgrNbcMe1b9GqQZ+a4tbaP+oE37wbiKdyQ68LjrEbV08Y1O # qrFF4oxquV31QJcUiuII1W7hC6psGrMsUA1f1qDu7QvmybAZWNZNsR9T66X9jH5J # wXMShJmmXwxugohmuPPFnDshzJy90aFL6Jy2shrfqcG2v0W66ARY1ZnbJLCcfczt # 073bnE2dnOVhd/ny37RrIJNJLLmYM0yFDeKuYtNNAzpK9fpA7Q2PI8QiqNacQ3Pa # TdEYrGlMk7OeNck8xJmJMY5rATthi1D4dIBv3rjQbUolQvPJe2Y9or0R2WL1jK5v # hhr6DY01iSPES3CravmUs/aB1HRMPi/nX45OmFR6frAB7xqWMreh81heBVuoTTK8 # PuXtRQgRMRKwDeTxlc6p+zba4mIEYG8rqJtPFRgViNCJ1KsgSIowup3BNU05YuFn # NoPoRayMDVMgejVgJin3Mg2DCYvt/+MBmO4IoggWlFsXj59uUgA= # =DXnZ # -----END PGP SIGNATURE----- # gpg: Signature made Fri 25 Apr 2025 11:26:55 EDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'single-binary-20250425' of https://github.com/philmd/qemu: (58 commits) qemu: Convert target_name() to TargetInfo API accel: Move target-agnostic code from accel-target.c -> accel-common.c accel: Make AccelCPUClass structure target-agnostic accel: Include missing 'qemu/accel.h' header in accel-internal.h accel: Implement accel_init_ops_interfaces() for both system/user mode cpus: Move target-agnostic methods out of cpu-target.c cpus: Replace CPU_RESOLVING_TYPE -> target_cpu_type() qemu: Introduce target_cpu_type() qapi: Rename TargetInfo structure as QemuTargetInfo hw/microblaze: Evaluate TARGET_BIG_ENDIAN at compile time hw/mips: Evaluate TARGET_BIG_ENDIAN at compile time target/xtensa: Evaluate TARGET_BIG_ENDIAN at compile time target/mips: Check CPU endianness at runtime using env_is_bigendian() accel/kvm: Use target_needs_bswap() linux-user/elfload: Use target_needs_bswap() target/hexagon: Include missing 'accel/tcg/getpc.h' accel/tcg: Correct list of included headers in tcg-stub.c system/kvm: make functions accessible from common code meson: Use osdep_prefix for strchrnul() meson: Share common C source prefixes ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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090c9641 |
| 27-Apr-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-vfio-20250425' of https://github.com/legoater/qemu into staging
vfio queue:
* Updated IGD passthrough documentation * Fixed L2 crash on pseries machines * Reorganized code and renam
Merge tag 'pull-vfio-20250425' of https://github.com/legoater/qemu into staging
vfio queue:
* Updated IGD passthrough documentation * Fixed L2 crash on pseries machines * Reorganized code and renamed services * Moved HostIOMMUDevice realize after device attachement to help adding support for nested IOMMU * Fixed CPR registration with IOMMUFD backend * Refactored vfio-pci code to prepare ground for vfio-user
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmgLS9IACgkQUaNDx8/7 # 7KG4pxAAt5M4hDy6J1itsHhb50ORqEejdLwxKgJbSUPhRznzJBLqDoKFjtf0iiu3 # sSqGzcBAOPIrUmLiS7F31v7KxG7WkKGeWoRa3xaltnQ/6Z9v5FgWPvDKfUsI5C52 # eGg0gmXQeFQeuN5N+pJ/oDhyvzH9UKvesEYvbZrSRhau+7k06zFfrT2vGMjM4+0h # A6Rd56dh99jT2kxbULr9eHuuYZxwse/wv0XWLponutBWeroqUzeEwwjYctVRMKR4 # HMVzrz+05EoIlFpY1EELE3SIZ9IaYViI6K3CHV2wE1TqrUWvipvY1oh2eJalFG78 # 5pyUY1Kb/iFR5AXPowzJkPc6il/1duXEghxYhPs6qxIZus3wQag1UwHoT8bw2dzV # gLV6yk4w277VzzrYSTI7kgrCM0FNs/rdXmDAk8F0C63W9BV6lFt8t7i3DA27kEGe # 58Ee71OPKCswzuqyu+t7zJKXEGvcR7/g2sXHkiHWKcrCfVSWG4Va/hnXpMGxM7Iw # 35wzToYHYBxtdn5W92g9DtFgYAlQKivriylXSsJzhz9fjnQAOmLGKacjsJTCEpBR # CJrIEsz1Zg+jmeBK8AO2OJUetW4wLtKsHW9uNRJVgjQ+eY8FKnzA6lNwGrEwrCNB # rql77fw08jNtMNbU7M3G7a8OIYJoSVyH6wwar0qZA8IZjLkHY00= # =eSsm # -----END PGP SIGNATURE----- # gpg: Signature made Fri 25 Apr 2025 04:46:10 EDT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full] # gpg: aka "Cédric Le Goater <clg@kaod.org>" [full] # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1
* tag 'pull-vfio-20250425' of https://github.com/legoater/qemu: (50 commits) vfio: refactor out vfio_pci_config_setup() vfio: refactor out vfio_interrupt_setup() vfio: Register/unregister container for CPR only once for each container vfio: Remove hiod_typename property vfio: Cleanup host IOMMU device creation vfio/container: Move realize() after attachment vfio/iommufd: Move realize() after attachment vfio/iommufd: Make a separate call to get IOMMU capabilities MAINTAINERS: Add a maintainer for util/vfio-helpers.c vfio: Rename VFIOContainer related services vfio: Rename VFIODevice related services vfio: Rename vfio-common.h to vfio-device.h vfio: Introduce vfio_listener_un/register() routines vfio: Rename RAM discard related services vfio: Introduce new files for VFIO MemoryListener vfio: Rename vfio_get_dirty_bitmap() vfio: Rename vfio_devices_all_device_dirty_tracking() vfio: Rename vfio_devices_all_dirty_tracking_started() vfio: Make vfio_container_query_dirty_bitmap() static vfio: Make vfio_devices_query_dirty_bitmap() static ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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3d881164 |
| 23-Mar-2025 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
qemu: Convert target_name() to TargetInfo API
Have target_name() be a target-agnostic method, dispatching to a per-target TargetInfo singleton structure. By default a stub singleton is used. No logi
qemu: Convert target_name() to TargetInfo API
Have target_name() be a target-agnostic method, dispatching to a per-target TargetInfo singleton structure. By default a stub singleton is used. No logical change expected.
Inspired-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250424222112.36194-3-philmd@linaro.org>
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44246e71 |
| 23-Mar-2025 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
accel: Make AccelCPUClass structure target-agnostic
Move the target-agnostic parts of "accel/accel-cpu-target.h" to "accel/accel-cpu.h".
Doing so we need to include missing "hw/core/cpu.h" header i
accel: Make AccelCPUClass structure target-agnostic
Move the target-agnostic parts of "accel/accel-cpu-target.h" to "accel/accel-cpu.h".
Doing so we need to include missing "hw/core/cpu.h" header in "accel/accel-cpu.h" otherwise we get:
include/accel/accel-cpu-target.h:39:28: error: unknown type name 'CPUClass' 39 | void (*cpu_class_init)(CPUClass *cc); | ^
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20250417165430.58213-7-philmd@linaro.org>
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64cbcf1d |
| 23-Mar-2025 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
accel: Implement accel_init_ops_interfaces() for both system/user mode
We want to build more common code, moving objects from meson's specific_ss[] set to common_ss[]. Since the CONFIG_USER_ONLY def
accel: Implement accel_init_ops_interfaces() for both system/user mode
We want to build more common code, moving objects from meson's specific_ss[] set to common_ss[]. Since the CONFIG_USER_ONLY definitions isn't applied on the common_ss[] set, it is simpler to add an empty accel_init_ops_interfaces() stub on user emulation, removing any CONFIG_USER_ONLY use in accel-target.c.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20250417165430.58213-5-philmd@linaro.org>
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2b7ae6e0 |
| 17-Apr-2025 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
qemu: Introduce target_cpu_type()
Introduce the target_cpu_type() helper to access the CPU_RESOLVING_TYPE target-specific definition from target-agnostic code.
Reviewed-by: Pierrick Bouvier <pierri
qemu: Introduce target_cpu_type()
Introduce the target_cpu_type() helper to access the CPU_RESOLVING_TYPE target-specific definition from target-agnostic code.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20250417165430.58213-2-philmd@linaro.org>
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12963e79 |
| 23-Apr-2025 |
BALATON Zoltan <balaton@eik.bme.hu> |
pc-bios: Move device tree files in their own subdir
We have several device tree files already and may have more in the future so add a new dtb subdirectory and move device tree files there so they a
pc-bios: Move device tree files in their own subdir
We have several device tree files already and may have more in the future so add a new dtb subdirectory and move device tree files there so they are not mixed with ROM binaries.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <57f179bd3904c1f2ca062ca4d4ff9592bb4f4daa.1745402140.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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85ae745e |
| 22-Apr-2025 |
Cédric Le Goater <clg@redhat.com> |
MAINTAINERS: Add a maintainer for util/vfio-helpers.c
The NVMe Block device driver makes use of a reduced VFIO library managing the host interface. These routines are VFIO related and do not have a
MAINTAINERS: Add a maintainer for util/vfio-helpers.c
The NVMe Block device driver makes use of a reduced VFIO library managing the host interface. These routines are VFIO related and do not have a maintainer. Move util/vfio-helpers.c under VFIO jurisdiction.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Link: https://lore.kernel.org/qemu-devel/20250422162954.210706-1-clg@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
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fc524567 |
| 24-Apr-2025 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-tcg-20250423' of https://gitlab.com/rth7680/qemu into staging
meson: Introduce top-level libuser_ss and libsystem_ss meson: Add hw_common_arch dictionary accel/tcg: Lots of cleanups
Merge tag 'pull-tcg-20250423' of https://gitlab.com/rth7680/qemu into staging
meson: Introduce top-level libuser_ss and libsystem_ss meson: Add hw_common_arch dictionary accel/tcg: Lots of cleanups to enable build once for: user-exec-stub.c, plugin-gen.c, translator.c page-vary: Restrict scope of TARGET_PAGE_BITS_MIN tcg: Always define TARGET_INSN_START_EXTRA_WORDS tcg: Convert TARGET_GUEST_DEFAULT_MO to TCGCPUOps::guest_default_memory_order tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field target/riscv: Do not expose rv128 CPU on user mode emulation
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmgJikUdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+t0gf9E9OWD3oQ7NIl+azS # imEFCKwuDxR0g07fH0aM9DW6e01mPQjxe3bmfxuYZbGUu0aJ/WzTbzfkX4qAiPeV # S32e5wwuYOknzDgoI9r8QTFUdelvBgxtVbxyZWJcWZFbLu4oPUhVUvpLJTWaxefo # VUL0g1LgJEYcWnzKFerb9kuiMXeDLsMd4eEX9g4XMAclHEDihND0hPKc3X7sYsmX # N/MtZUY1Zth0c53aq7bP5MBwNIH3tH3o+xAFcBhxiBQ/HxfX7qeNgOTIKo92ApfL # xcQul1AA/q9uQhCKsgfCxZDU4BhcR6sfmCOiDiTTEs+4zlWVDWjWwYtoednhf7ok # v3l9+A== # =qyvX # -----END PGP SIGNATURE----- # gpg: Signature made Wed 23 Apr 2025 20:48:05 EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20250423' of https://gitlab.com/rth7680/qemu: (148 commits) tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field target/i386: Remove AccelCPUClass::cpu_class_init need target/riscv: Remove AccelCPUClass::cpu_class_init need accel/tcg: Move mttcg warning to tcg_init_machine tcg: Convert TCGState::mttcg_enabled to TriState accel/tcg: Remove mttcg_enabled tcg: Move qemu_tcg_mttcg_enabled() to 'system/tcg.h' tcg: Pass max_threads not max_cpus to tcg_init tcg: Move cpu_req_mo() macro to target-agnostic 'backend-ldst.h' tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally tcg: Have tcg_req_mo() use TCGCPUOps::guest_default_memory_order tcg: Propagate CPUState argument to cpu_req_mo() tcg: Remove use of TCG_GUEST_DEFAULT_MO in tb_gen_code() tcg: Define guest_default_memory_order in TCGCPUOps tcg: Simplify tcg_req_mo() macro tcg: Always define TCG_GUEST_DEFAULT_MO exec: Do not include 'accel/tcg/cpu-ldst.h' in 'exec-all.h' exec: Restrict 'cpu_ldst.h' to accel/tcg/ exec: Restrict 'cpu-ldst-common.h' to accel/tcg/ tcg: Always define TARGET_INSN_START_EXTRA_WORDS ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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