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/linux/drivers/gpu/drm/i915/display/
H A Dintel_pch.c44 * die as the north display. The PCH (if it even exists) is not involved in
45 * display. Return a fake PCH type for south display handling on these
46 * platforms, without actually detecting the PCH, and PCH_NONE otherwise.
64 /* Map PCH device id to PCH type, or PCH_NONE if unknown. */
70 drm_dbg_kms(display->drm, "Found Ibex Peak PCH\n"); in intel_pch_type()
74 drm_dbg_kms(display->drm, "Found CougarPoint PCH\n"); in intel_pch_type()
80 drm_dbg_kms(display->drm, "Found PantherPoint PCH\n"); in intel_pch_type()
87 drm_dbg_kms(display->drm, "Found LynxPoint PCH\n"); in intel_pch_type()
96 drm_dbg_kms(display->drm, "Found LynxPoint LP PCH\ in intel_pch_type()
280 struct pci_dev *pch = NULL; intel_pch_detect() local
[all...]
H A Dintel_pch.h15 * If the new PCH comes with a south display engine that is not
17 * end. Instead, add it right after its "parent" PCH.
20 PCH_NOP = -1, /* PCH without south display */
21 PCH_NONE = 0, /* No PCH present */
22 PCH_IBX, /* Ibexpeak PCH */
23 PCH_CPT, /* Cougarpoint/Pantherpoint PCH */
24 PCH_LPT_H, /* Lynxpoint/Wildcatpoint H PCH */
25 PCH_LPT_LP, /* Lynxpoint/Wildcatpoint LP PCH */
26 PCH_SPT, /* Sunrisepoint/Kaby Lake PCH */
27 PCH_CNP, /* Cannon/Comet Lake PCH */
[all...]
H A Dintel_pch_display.c52 "PCH DP %c enabled on transcoder %c, should be disabled\n", in assert_pch_dp_disabled()
57 "IBX PCH DP %c still using transcoder B\n", in assert_pch_dp_disabled()
71 "PCH HDMI %c enabled on transcoder %c, should be disabled\n", in assert_pch_hdmi_disabled()
76 "IBX PCH HDMI %c still using transcoder B\n", in assert_pch_hdmi_disabled()
91 "PCH VGA enabled on transcoder %c, should be disabled\n", in assert_pch_ports_disabled()
96 "PCH LVDS enabled on transcoder %c, should be disabled\n", in assert_pch_ports_disabled()
99 /* PCH SDVOB multiplex with HDMIB */ in assert_pch_ports_disabled()
159 * The BIOS may select transcoder B on some of the PCH in ibx_sanitize_pch_ports()
173 /* PCH SDVOB multiplex with HDMIB */ in ibx_sanitize_pch_ports()
254 /* Make sure PCH DPL in ilk_enable_pch_transcoder()
[all...]
/linux/drivers/net/ppp/
H A Dppp_generic.c268 static void ppp_channel_push(struct channel *pch);
270 struct channel *pch);
277 struct channel *pch);
292 static int ppp_connect_channel(struct channel *pch, int unit);
293 static int ppp_disconnect_channel(struct channel *pch);
294 static void ppp_destroy_channel(struct channel *pch);
645 static int ppp_bridge_channels(struct channel *pch, struct channel *pchb) in ppp_bridge_channels() argument
647 write_lock_bh(&pch->upl); in ppp_bridge_channels()
648 if (pch->ppp || in ppp_bridge_channels()
649 rcu_dereference_protected(pch in ppp_bridge_channels()
684 ppp_unbridge_channels(struct channel * pch) ppp_unbridge_channels() argument
755 struct channel *pch, *pchb; ppp_ioctl() local
1596 struct channel *pch; ppp_fill_forward_path() local
1878 struct channel *pch; ppp_push() local
1942 struct channel *pch; ppp_mp_explode() local
2157 __ppp_channel_push(struct channel * pch) __ppp_channel_push() argument
2185 ppp_channel_push(struct channel * pch) ppp_channel_push() argument
2214 ppp_do_recv(struct ppp * ppp,struct sk_buff * skb,struct channel * pch) ppp_do_recv() argument
2269 ppp_channel_bridge_input(struct channel * pch,struct sk_buff * skb) ppp_channel_bridge_input() argument
2301 struct channel *pch = chan->ppp; ppp_input() local
2344 struct channel *pch = chan->ppp; ppp_input_error() local
2367 ppp_receive_frame(struct ppp * ppp,struct sk_buff * skb,struct channel * pch) ppp_receive_frame() argument
2609 ppp_receive_mp_frame(struct ppp * ppp,struct sk_buff * skb,struct channel * pch) ppp_receive_mp_frame() argument
2898 struct channel *pch; ppp_register_net_channel() local
2934 struct channel *pch = chan->ppp; ppp_channel_index() local
2946 struct channel *pch = chan->ppp; ppp_unit_number() local
2963 struct channel *pch = chan->ppp; ppp_dev_name() local
2983 struct channel *pch = chan->ppp; ppp_unregister_channel() local
3023 struct channel *pch = chan->ppp; ppp_output_wakeup() local
3459 struct channel *pch; ppp_find_channel() local
3480 ppp_connect_channel(struct channel * pch,int unit) ppp_connect_channel() argument
3536 ppp_disconnect_channel(struct channel * pch) ppp_disconnect_channel() argument
3562 ppp_destroy_channel(struct channel * pch) ppp_destroy_channel() argument
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/linux/drivers/dma/
H A Dpl330.c1559 struct dma_pl330_chan *pch; in dma_pl330_rqcb() local
1565 pch = desc->pchan; in dma_pl330_rqcb()
1568 if (!pch) in dma_pl330_rqcb()
1571 spin_lock_irqsave(&pch->lock, flags); in dma_pl330_rqcb()
1575 spin_unlock_irqrestore(&pch->lock, flags); in dma_pl330_rqcb()
1577 tasklet_schedule(&pch->task); in dma_pl330_rqcb()
2042 static inline void fill_queue(struct dma_pl330_chan *pch) in fill_queue() argument
2047 list_for_each_entry(desc, &pch->work_list, node) { in fill_queue()
2053 ret = pl330_submit_req(pch->thread, desc); in fill_queue()
2062 dev_err(pch in fill_queue()
2071 struct dma_pl330_chan *pch = from_tasklet(pch, t, task); pl330_tasklet() local
2164 struct dma_pl330_chan *pch = to_pchan(chan); pl330_alloc_chan_resources() local
2205 pl330_unprep_slave_fifo(struct dma_pl330_chan * pch) pl330_unprep_slave_fifo() argument
2214 pl330_prep_slave_fifo(struct dma_pl330_chan * pch,enum dma_transfer_direction dir) pl330_prep_slave_fifo() argument
2248 struct dma_pl330_chan *pch = to_pchan(chan); pl330_config_write() local
2273 struct dma_pl330_chan *pch = to_pchan(chan); pl330_config() local
2282 struct dma_pl330_chan *pch = to_pchan(chan); pl330_terminate_all() local
2333 struct dma_pl330_chan *pch = to_pchan(chan); pl330_pause() local
2358 struct dma_pl330_chan *pch = to_pchan(chan); pl330_free_chan_resources() local
2379 pl330_get_current_xferred_count(struct dma_pl330_chan * pch,struct dma_pl330_desc * desc) pl330_get_current_xferred_count() argument
2413 struct dma_pl330_chan *pch = to_pchan(chan); pl330_tx_status() local
2482 struct dma_pl330_chan *pch = to_pchan(chan); pl330_issue_pending() local
2510 struct dma_pl330_chan *pch = to_pchan(tx->chan); pl330_tx_submit() local
2596 pl330_get_desc(struct dma_pl330_chan * pch) pl330_get_desc() argument
2639 __pl330_prep_dma_memcpy(struct dma_pl330_chan * pch,dma_addr_t dst,dma_addr_t src,size_t len) __pl330_prep_dma_memcpy() argument
2668 struct dma_pl330_chan *pch = desc->pchan; get_burst_len() local
2689 struct dma_pl330_chan *pch = to_pchan(chan); pl330_prep_dma_cyclic() local
2779 struct dma_pl330_chan *pch = to_pchan(chan); pl330_prep_dma_memcpy() local
2852 struct dma_pl330_chan *pch = to_pchan(chan); pl330_prep_slave_sg() local
2939 struct dma_pl330_chan *pch = &pl330->peripherals[pr]; pl330_debugfs_show() local
3010 struct dma_pl330_chan *pch, *_p; pl330_probe() local
3211 struct dma_pl330_chan *pch, *_p; pl330_remove() local
[all...]
/linux/Documentation/arch/loongarch/
H A Dirq-chip-model.rst11 PCH-PIC (Main Interrupt Controller in LS7A chipset), PCH-LPC (LPC Interrupt Controller
12 in LS7A chipset) and PCH-MSI (MSI Interrupt Controller).
15 controllers (in CPU), while PCH-PIC/PCH-LPC/PCH-MSI are controllers out of CPU (i.e.,
24 interrupts go to PCH-PIC/PCH-LPC/PCH-MSI and gathered by HTVECINTC, and then go
43 | PCH
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/linux/drivers/pinctrl/intel/
H A DKconfig28 Lynxpoint is the PCH of Intel Haswell. This pinctrl driver
29 provides an interface that allows configuring of PCH pins and
45 of Intel PCH pins and using them as GPIOs. Currently the following
55 of Intel Alder Lake PCH pins and using them as GPIOs.
65 tristate "Intel Cannon Lake PCH pinctrl and GPIO driver"
69 of Intel Cannon Lake PCH pins and using them as GPIOs.
76 of Intel Cedar Fork PCH pins and using them as GPIOs.
107 tristate "Intel Ice Lake PCH pinctrl and GPIO driver"
111 of Intel Ice Lake PCH pins and using them as GPIOs.
114 tristate "Intel Jasper Lake PCH pinctr
[all...]
/linux/Documentation/translations/zh_TW/arch/loongarch/
H A Dirq-chip-model.rst15 HTVECINTC（Hyper-Transport Vector Interrupt Controller）、PCH-PIC（LS7A芯片組的主中
16 斷控制器）、PCH-LPC（LS7A芯片組的LPC中斷控制器）和PCH-MSI（MSI中斷控制器）。
19 全局中斷控制器（每個芯片一個，所有核共享），而PCH-PIC/PCH-LPC/PCH-MSI是CPU外部的中
28 PCH-LPC/PCH-MSI，然後被HTVECINTC統一收集，再發送到LIOINTC，最後到達CPUINTC::
46 | PCH-PIC | | PCH-MSI |
51 | PCH-LPC | | Devices | | Devices |
64 PCH
[all...]
/linux/Documentation/translations/zh_CN/arch/loongarch/
H A Dirq-chip-model.rst15 HTVECINTC（Hyper-Transport Vector Interrupt Controller）、PCH-PIC（LS7A芯片组的主中
16 断控制器）、PCH-LPC（LS7A芯片组的LPC中断控制器）和PCH-MSI（MSI中断控制器）。
19 全局中断控制器（每个芯片一个，所有核共享），而PCH-PIC/PCH-LPC/PCH-MSI是CPU外部的中
28 PCH-LPC/PCH-MSI，然后被HTVECINTC统一收集，再发送到LIOINTC，最后到达CPUINTC::
46 | PCH-PIC | | PCH-MSI |
51 | PCH-LPC | | Devices | | Devices |
64 PCH
[all...]
/linux/Documentation/i2c/busses/
H A Di2c-i801.rst21 * Intel 5/3400 Series (PCH)
22 * Intel 6 Series (PCH)
23 * Intel Patsburg (PCH)
24 * Intel DH89xxCC (PCH)
25 * Intel Panther Point (PCH)
26 * Intel Lynx Point (PCH)
28 * Intel Wellsburg (PCH)
29 * Intel Coleto Creek (PCH)
30 * Intel Wildcat Point (PCH)
33 * Intel Sunrise Point (PCH)
[all...]
/linux/drivers/thermal/intel/
H A Dintel_pch_thermal.c2 /* intel_pch_thermal.c - Intel PCH Thermal driver
21 /* Intel PCH thermal Device IDs */
22 #define PCH_THERMAL_DID_HSW_1 0x9C24 /* Haswell PCH */
23 #define PCH_THERMAL_DID_HSW_2 0x8C24 /* Haswell PCH */
25 #define PCH_THERMAL_DID_SKL 0x9D31 /* Skylake PCH */
26 #define PCH_THERMAL_DID_SKL_H 0xA131 /* Skylake PCH 100 series */
27 #define PCH_THERMAL_DID_CNL 0x9Df9 /* CNL PCH */
28 #define PCH_THERMAL_DID_CNL_H 0xA379 /* CNL-H PCH */
29 #define PCH_THERMAL_DID_CNL_LP 0x02F9 /* CNL-LP PCH */
30 #define PCH_THERMAL_DID_CML_H 0X06F9 /* CML-H PCH */
[all...]
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dloongson,pch-msi.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-msi.yaml#
7 title: Loongson PCH MSI Controller
13 This interrupt controller is found in the Loongson LS7A family of PCH for
19 const: loongson,pch-msi-1.0
27 to PCH MSI.
35 to PCH MSI.
55 compatible = "loongson,pch-msi-1.0";
H A Dloongson,pch-pic.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yaml#
7 title: Loongson PCH PIC Controller
13 This interrupt controller is found in the Loongson LS7A family of PCH for
19 const: loongson,pch-pic-1.0
27 to PCH PIC.
50 compatible = "loongson,pch-pic-1.0";
/linux/drivers/net/ethernet/oki-semi/pch_gbe/
H A DKconfig14 This is a gigabit ethernet driver for EG20T PCH.
15 EG20T PCH is the platform controller hub that is used in Intel's
16 general embedded platform. EG20T PCH has Gigabit Ethernet interface.
25 ML7223/ML7831 is completely compatible for Intel EG20T PCH.
/linux/drivers/i2c/busses/
H A Di2c-i801.c34 * 5/3400 Series (PCH) 0x3b30 32 hard yes yes yes
35 * 6 Series (PCH) 0x1c22 32 hard yes yes yes
36 * Patsburg (PCH) 0x1d22 32 hard yes yes yes
37 * Patsburg (PCH) IDF 0x1d70 32 hard yes yes yes
38 * Patsburg (PCH) IDF 0x1d71 32 hard yes yes yes
39 * Patsburg (PCH) IDF 0x1d72 32 hard yes yes yes
40 * DH89xxCC (PCH) 0x2330 32 hard yes yes yes
41 * Panther Point (PCH) 0x1e22 32 hard yes yes yes
42 * Lynx Point (PCH) 0x8c22 32 hard yes yes yes
43 * Lynx Point-LP (PCH)
[all...]
H A DKconfig113 tristate "Intel 82801 (ICH/PCH)"
136 5/3400 Series (PCH)
137 6 Series (PCH)
138 Patsburg (PCH)
139 DH89xxCC (PCH)
140 Panther Point (PCH)
141 Lynx Point (PCH)
143 Wellsburg (PCH)
144 Coleto Creek (PCH)
145 Wildcat Point (PCH)
[all...]
/linux/arch/loongarch/kvm/intc/
H A Dpch_pic.c50 /* called when a irq is triggered in pch pic */
81 * pch pic register is 64-bit, but it is accessed by 32-bit,
94 * pch pic register is 64-bit, but it is accessed by 32-bit,
194 kvm_err("%s: pch pic irqchip not valid!\n", __func__); in kvm_pch_pic_read()
198 /* statistics of pch pic reading */ in kvm_pch_pic_read()
301 kvm_err("%s: pch pic irqchip not valid!\n", __func__); in kvm_pch_pic_write()
305 /* statistics of pch pic writing */ in kvm_pch_pic_write()
326 /* init device by pch pic writing and reading ops */ in kvm_pch_pic_init()
329 /* register pch pic device */ in kvm_pch_pic_init()
336 /* used by user space to get or set pch pi
[all...]
/linux/Documentation/PCI/
H A Dboot-interrupts.rst16 IO-APIC table entries), the messages are routed to the legacy PCH. This
23 PCH and mitigation within BIOS and the OS.
29 When in-band legacy INTx messages are forwarded to the PCH, they in turn
80 devices. IO-APIC is only in the PCH. Devices connected to the Core IO's
87 first identify and make use of a means to disable the routing to the PCH.
105 PCH - they are either converted into MSI via the integrated IO-APIC
119 disable) the redirection of the interrupt handler to the PCH interrupt
/linux/drivers/platform/x86/intel/pmc/
H A DKconfig22 - PCH IP Power Gating status
24 - MPHY/PLL gating status (Sunrisepoint PCH only)
25 - SLPS0 Debug registers (Cannonlake/Icelake PCH)
H A Dspt.c4 * and init function used by Sunrise Point PCH.
104 /* EVA is Enterprise Value Add, doesn't really exist on PCH */
147 * Coffee Lake has CPU ID of Kaby Lake and Cannon Lake PCH. So here in spt_core_init()
148 * Sunrisepoint PCH regmap can't be used. Use Cannon Lake PCH regmap in spt_core_init()
/linux/arch/mips/boot/dts/loongson/
H A Dloongson64c_4core_ls7a.dts6 #include "ls7a-pch.dtsi"
27 &pch {
29 compatible = "loongson,pch-msi-1.0";
H A Dloongson64g_4core_ls7a.dts6 #include "ls7a-pch.dtsi"
31 &pch {
33 compatible = "loongson,pch-msi-1.0";
/linux/drivers/acpi/dptf/
H A DKconfig33 tristate "PCH FIVR DPTF Participant"
37 (DPTF) PCH FIVR Participant device support. This driver allows to
38 switch the PCH FIVR (Fully Integrated Voltage Regulator) frequency.
H A Ddptf_pch_fivr.c3 * dptf_pch_fivr: DPTF PCH FIVR Participant driver
51 * freq_mhz_low_clock : Set PCH FIVR switching freq for
53 * freq_mhz_high_clock : Set PCH FIVR switching freq for
173 MODULE_DESCRIPTION("ACPI DPTF PCH FIVR driver");
/linux/drivers/isdn/mISDN/
H A Dstack.c565 struct mISDNchannel *pch; in delete_channel() local
592 pch = get_channel4id(ch->st, ch->nr); in delete_channel()
593 if (pch) { in delete_channel()
595 list_del(&pch->list); in delete_channel()
597 pch->ctrl(pch, CLOSE_CHANNEL, NULL); in delete_channel()
598 pch = ch->st->dev->teimgr; in delete_channel()
599 pch->ctrl(pch, CLOSE_CHANNEL, NULL); in delete_channel()
605 pch in delete_channel()
[all...]

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