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/linux/Documentation/devicetree/bindings/mux/
H A Dmux-consumer.yaml4 $id: http://devicetree.org/schemas/mux/mux-consumer.yaml#
13 Mux controller consumers should specify a list of mux controllers that they
14 want to use with a property containing a 'mux-ctrl-list':
16 mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
17 single-mux-ctrl ::= <mux
[all...]
H A Dreg-mux.yaml4 $id: http://devicetree.org/schemas/mux/reg-mux.yaml#
19 - reg-mux # parent device of mux controller is not syscon device
20 - mmio-mux # parent device of mux controller is syscon device
24 '#mux-control-cells':
27 mux-reg-masks:
33 description: Each entry pair describes a single mux control.
39 - mux
[all...]
H A Dadi,adg792a.txt5 - #mux-control-cells : <0> if parallel (the three muxes are bound together
6 with a single mux controller controlling all three muxes), or <1> if
7 not (one mux controller for each mux).
8 * Standard mux-controller bindings as described in mux-controller.yaml
18 - idle-state : if present, array of states that the mux controllers will have
27 * Three independent mux controllers (of which one is used).
28 * Mux 0 is disconnected when idle, mux
[all...]
H A Dgpio-mux.yaml4 $id: http://devicetree.org/schemas/mux/gpio-mux.yaml#
22 const: gpio-mux
24 mux-gpios:
28 mux-supply:
32 '#mux-control-cells':
35 '#mux-state-cells':
43 - mux-gpios
46 - "#mux-control-cells"
48 - "#mux
[all...]
/linux/drivers/mux/
H A Dcore.c10 #define pr_fmt(fmt) "mux-core: " fmt
19 #include <linux/mux/consumer.h>
20 #include <linux/mux/driver.h>
32 * struct mux_state - Represents a mux controller state specific to a given
34 * @mux: Pointer to a mux controller.
35 * @state: State of the mux to be selected.
41 struct mux_control *mux; member
46 .name = "mux",
72 .name = "mux
125 struct mux_control *mux = &mux_chip->mux[i]; mux_chip_alloc() local
140 mux_control_set(struct mux_control * mux,int state) mux_control_set() argument
168 struct mux_control *mux = &mux_chip->mux[i]; mux_chip_register() local
302 mux_control_states(struct mux_control * mux) mux_control_states() argument
311 __mux_control_select(struct mux_control * mux,int state) __mux_control_select() argument
332 mux_control_delay(struct mux_control * mux,unsigned int delay_us) mux_control_delay() argument
365 mux_control_select_delay(struct mux_control * mux,unsigned int state,unsigned int delay_us) mux_control_select_delay() argument
425 mux_control_try_select_delay(struct mux_control * mux,unsigned int state,unsigned int delay_us) mux_control_try_select_delay() argument
477 mux_control_deselect(struct mux_control * mux) mux_control_deselect() argument
630 mux_control_put(struct mux_control * mux) mux_control_put() argument
638 struct mux_control *mux = *(struct mux_control **)res; devm_mux_control_release() local
654 struct mux_control **ptr, *mux; devm_mux_control_get() local
[all...]
/linux/drivers/clk/ti/
H A Dmux.c23 struct clk_omap_mux *mux = to_clk_omap_mux(hw); in ti_clk_mux_get_parent() local
28 * FIXME need a mux-specific flag to determine if val is bitwise or in ti_clk_mux_get_parent()
34 val = ti_clk_ll_ops->clk_readl(&mux->reg) >> mux->shift; in ti_clk_mux_get_parent()
35 val &= mux->mask; in ti_clk_mux_get_parent()
37 if (mux->table) { in ti_clk_mux_get_parent()
41 if (mux->table[i] == val) in ti_clk_mux_get_parent()
46 if (val && (mux->flags & CLK_MUX_INDEX_BIT)) in ti_clk_mux_get_parent()
49 if (val && (mux->flags & CLK_MUX_INDEX_ONE)) in ti_clk_mux_get_parent()
60 struct clk_omap_mux *mux in ti_clk_mux_set_parent() local
94 struct clk_omap_mux *mux = to_clk_omap_mux(hw); clk_mux_save_context() local
108 struct clk_omap_mux *mux = to_clk_omap_mux(hw); clk_mux_restore_context() local
127 struct clk_omap_mux *mux; _register_mux() local
224 struct clk_omap_mux *mux; ti_clk_build_component_mux() local
253 struct clk_omap_mux *mux; of_ti_composite_mux_clk_setup() local
[all...]
/linux/drivers/iio/multiplexer/
H A Diio-mux.c17 #include <linux/mux/consumer.h>
30 struct mux { struct
40 static int iio_mux_select(struct mux *mux, int idx) in iio_mux_select() argument
42 struct mux_child *child = &mux->child[idx]; in iio_mux_select()
43 struct iio_chan_spec const *chan = &mux->chan[idx]; in iio_mux_select()
47 ret = mux_control_select_delay(mux->control, chan->channel, in iio_mux_select()
48 mux->delay_us); in iio_mux_select()
50 mux->cached_state = -1; in iio_mux_select()
54 if (mux in iio_mux_select()
32 controlmux global() argument
36 childmux global() argument
83 iio_mux_deselect(struct mux * mux) iio_mux_deselect() argument
92 struct mux *mux = iio_priv(indio_dev); mux_read_raw() local
123 struct mux *mux = iio_priv(indio_dev); mux_read_avail() local
150 struct mux *mux = iio_priv(indio_dev); mux_write_raw() local
181 struct mux *mux = iio_priv(indio_dev); mux_read_ext_info() local
203 struct mux *mux = iio_priv(indio_dev); mux_write_ext_info() local
241 mux_configure_chan_ext_info(struct device * dev,struct mux * mux,int idx,int num_ext_info) mux_configure_chan_ext_info() argument
294 mux_configure_channel(struct device * dev,struct mux * mux,u32 state,const char * label,int idx) mux_configure_channel() argument
340 struct mux *mux; mux_probe() local
[all...]
/linux/drivers/clk/mediatek/
H A Dclk-mux.c18 #include "clk-mux.h"
35 struct mtk_clk_mux *mux = to_mtk_clk_mux(hw); in mtk_clk_mux_enable_setclr() local
38 if (mux->lock) in mtk_clk_mux_enable_setclr()
39 spin_lock_irqsave(mux->lock, flags); in mtk_clk_mux_enable_setclr()
41 __acquire(mux->lock); in mtk_clk_mux_enable_setclr()
43 regmap_write(mux->regmap, mux->data->clr_ofs, in mtk_clk_mux_enable_setclr()
44 BIT(mux->data->gate_shift)); in mtk_clk_mux_enable_setclr()
48 * not be effective yet. Set the update bit to ensure the mux gets in mtk_clk_mux_enable_setclr()
51 if (mux in mtk_clk_mux_enable_setclr()
67 struct mtk_clk_mux *mux = to_mtk_clk_mux(hw); mtk_clk_mux_disable_setclr() local
75 struct mtk_clk_mux *mux = to_mtk_clk_mux(hw); mtk_clk_mux_is_enabled() local
85 struct mtk_clk_mux *mux = to_mtk_clk_mux(hw); mtk_clk_mux_get_parent() local
108 struct mtk_clk_mux *mux = to_mtk_clk_mux(hw); mtk_clk_mux_set_parent_setclr_lock() local
149 struct mtk_clk_mux *mux = to_mtk_clk_mux(hw); mtk_clk_mux_determine_rate() local
172 mtk_clk_register_mux(struct device * dev,const struct mtk_mux * mux,struct regmap * regmap,spinlock_t * lock) mtk_clk_register_mux() argument
206 struct mtk_clk_mux *mux; mtk_clk_unregister_mux() local
233 const struct mtk_mux *mux = &muxes[i]; mtk_clk_register_muxes() local
256 const struct mtk_mux *mux = &muxes[i]; mtk_clk_register_muxes() local
278 const struct mtk_mux *mux = &muxes[i - 1]; mtk_clk_unregister_muxes() local
[all...]
H A Dclk-cpumux.c33 struct mtk_clk_cpumux *mux = to_mtk_clk_cpumux(hw); in clk_cpumux_get_parent() local
36 regmap_read(mux->regmap, mux->reg, &val); in clk_cpumux_get_parent()
38 val >>= mux->shift; in clk_cpumux_get_parent()
39 val &= mux->mask; in clk_cpumux_get_parent()
46 struct mtk_clk_cpumux *mux = to_mtk_clk_cpumux(hw); in clk_cpumux_set_parent() local
49 val = index << mux->shift; in clk_cpumux_set_parent()
50 mask = mux->mask << mux->shift; in clk_cpumux_set_parent()
52 return regmap_update_bits(mux in clk_cpumux_set_parent()
62 mtk_clk_register_cpumux(struct device * dev,const struct mtk_composite * mux,struct regmap * regmap) mtk_clk_register_cpumux() argument
121 const struct mtk_composite *mux = &clks[i]; mtk_clk_register_cpumuxes() local
143 const struct mtk_composite *mux = &clks[i]; mtk_clk_register_cpumuxes() local
162 const struct mtk_composite *mux = &clks[i - 1]; mtk_clk_unregister_cpumuxes() local
[all...]
/linux/drivers/i2c/muxes/
H A Di2c-mux-reg.c10 #include <linux/i2c-mux.h>
15 #include <linux/platform_data/i2c-mux-reg.h>
23 static int i2c_mux_reg_set(const struct regmux *mux, unsigned int chan_id) in i2c_mux_reg_set() argument
25 if (!mux->data.reg) in i2c_mux_reg_set()
34 switch (mux->data.reg_size) { in i2c_mux_reg_set()
36 if (mux->data.little_endian) in i2c_mux_reg_set()
37 iowrite32(chan_id, mux->data.reg); in i2c_mux_reg_set()
39 iowrite32be(chan_id, mux->data.reg); in i2c_mux_reg_set()
40 if (!mux->data.write_only) in i2c_mux_reg_set()
41 ioread32(mux in i2c_mux_reg_set()
63 struct regmux *mux = i2c_mux_priv(muxc); i2c_mux_reg_select() local
70 struct regmux *mux = i2c_mux_priv(muxc); i2c_mux_reg_deselect() local
79 i2c_mux_reg_probe_dt(struct regmux * mux,struct platform_device * pdev) i2c_mux_reg_probe_dt() argument
149 i2c_mux_reg_probe_dt(struct regmux * mux,struct platform_device * pdev) i2c_mux_reg_probe_dt() argument
159 struct regmux *mux; i2c_mux_reg_probe() local
[all...]
H A Di2c-mux-gpio.c13 #include <linux/i2c-mux.h>
16 #include <linux/platform_data/i2c-mux-gpio.h>
26 static void i2c_mux_gpio_set(const struct gpiomux *mux, unsigned int val) in i2c_mux_gpio_set() argument
32 gpiod_set_array_value_cansleep(mux->ngpios, mux->gpios, NULL, values); in i2c_mux_gpio_set()
37 struct gpiomux *mux = i2c_mux_priv(muxc); in i2c_mux_gpio_select() local
39 i2c_mux_gpio_set(mux, chan); in i2c_mux_gpio_select()
41 if (mux->data.settle_time) in i2c_mux_gpio_select()
42 fsleep(mux->data.settle_time); in i2c_mux_gpio_select()
49 struct gpiomux *mux in i2c_mux_gpio_deselect() local
56 i2c_mux_gpio_probe_fw(struct gpiomux * mux,struct platform_device * pdev) i2c_mux_gpio_probe_fw() argument
131 struct gpiomux *mux; i2c_mux_gpio_probe() local
[all...]
H A Di2c-mux-mlxcpld.c3 * Mellanox i2c mux driver
10 #include <linux/i2c-mux.h>
18 /* mlxcpld_mux - mux control structure:
19 * @last_val - last selected register value or -1 if mux deselected
29 /* MUX logic description.
30 * Driver can support different mux control logic, according to CPLD
37 * *--------* * -> mux1 (virt bus2) -> mux -> |
38 * | I2CLPC | i2c physical * -> mux2 (virt bus3) -> mux -> |
40 * | logic |---------------------> * mux reg * |
42 * *--------* i2c-mux
61 mlxcpld_mux_reg_write(struct i2c_adapter * adap,struct mlxcpld_mux * mux,u32 val) mlxcpld_mux_reg_write() argument
90 struct mlxcpld_mux *mux = i2c_mux_priv(muxc); mlxcpld_mux_select_chan() local
108 struct mlxcpld_mux *mux = i2c_mux_priv(muxc); mlxcpld_mux_deselect() local
[all...]
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ring_mux.c43 static inline struct amdgpu_mux_entry *amdgpu_ring_mux_sw_entry(struct amdgpu_ring_mux *mux, in amdgpu_ring_mux_sw_entry() argument
46 return ring->entry_index < mux->ring_entry_size ? in amdgpu_ring_mux_sw_entry()
47 &mux->ring_entry[ring->entry_index] : NULL; in amdgpu_ring_mux_sw_entry()
51 static void amdgpu_ring_mux_copy_pkt_from_sw_ring(struct amdgpu_ring_mux *mux, in amdgpu_ring_mux_copy_pkt_from_sw_ring() argument
56 struct amdgpu_ring *real_ring = mux->real_ring; in amdgpu_ring_mux_copy_pkt_from_sw_ring()
76 static void amdgpu_mux_resubmit_chunks(struct amdgpu_ring_mux *mux) in amdgpu_mux_resubmit_chunks() argument
84 if (!mux->s_resubmit) in amdgpu_mux_resubmit_chunks()
87 for (i = 0; i < mux->num_ring_entries; i++) { in amdgpu_mux_resubmit_chunks()
88 if (mux->ring_entry[i].ring->hw_prio <= AMDGPU_RING_PRIO_DEFAULT) { in amdgpu_mux_resubmit_chunks()
89 e = &mux in amdgpu_mux_resubmit_chunks()
131 amdgpu_ring_mux_schedule_resubmit(struct amdgpu_ring_mux * mux) amdgpu_ring_mux_schedule_resubmit() argument
138 struct amdgpu_ring_mux *mux = timer_container_of(mux, t, amdgpu_mux_resubmit_fallback() local
150 amdgpu_ring_mux_init(struct amdgpu_ring_mux * mux,struct amdgpu_ring * ring,unsigned int entry_size) amdgpu_ring_mux_init() argument
175 amdgpu_ring_mux_fini(struct amdgpu_ring_mux * mux) amdgpu_ring_mux_fini() argument
195 amdgpu_ring_mux_add_sw_ring(struct amdgpu_ring_mux * mux,struct amdgpu_ring * ring) amdgpu_ring_mux_add_sw_ring() argument
213 amdgpu_ring_mux_set_wptr(struct amdgpu_ring_mux * mux,struct amdgpu_ring * ring,u64 wptr) amdgpu_ring_mux_set_wptr() argument
253 amdgpu_ring_mux_get_wptr(struct amdgpu_ring_mux * mux,struct amdgpu_ring * ring) amdgpu_ring_mux_get_wptr() argument
282 amdgpu_ring_mux_get_rptr(struct amdgpu_ring_mux * mux,struct amdgpu_ring * ring) amdgpu_ring_mux_get_rptr() argument
319 struct amdgpu_ring_mux *mux = &adev->gfx.muxer; amdgpu_sw_ring_get_rptr_gfx() local
328 struct amdgpu_ring_mux *mux = &adev->gfx.muxer; amdgpu_sw_ring_get_wptr_gfx() local
337 struct amdgpu_ring_mux *mux = &adev->gfx.muxer; amdgpu_sw_ring_set_wptr_gfx() local
362 amdgpu_mcbp_scan(struct amdgpu_ring_mux * mux) amdgpu_mcbp_scan() argument
382 amdgpu_mcbp_trigger_preempt(struct amdgpu_ring_mux * mux) amdgpu_mcbp_trigger_preempt() argument
396 struct amdgpu_ring_mux *mux = &adev->gfx.muxer; amdgpu_sw_ring_ib_begin() local
411 struct amdgpu_ring_mux *mux = &adev->gfx.muxer; amdgpu_sw_ring_ib_end() local
422 struct amdgpu_ring_mux *mux = &adev->gfx.muxer; amdgpu_sw_ring_ib_mark_offset() local
433 amdgpu_ring_mux_start_ib(struct amdgpu_ring_mux * mux,struct amdgpu_ring * ring) amdgpu_ring_mux_start_ib() argument
462 scan_and_remove_signaled_chunk(struct amdgpu_ring_mux * mux,struct amdgpu_ring * ring) scan_and_remove_signaled_chunk() argument
484 amdgpu_ring_mux_ib_mark_offset(struct amdgpu_ring_mux * mux,struct amdgpu_ring * ring,u64 offset,enum amdgpu_ring_mux_offset_type type) amdgpu_ring_mux_ib_mark_offset() argument
519 amdgpu_ring_mux_end_ib(struct amdgpu_ring_mux * mux,struct amdgpu_ring * ring) amdgpu_ring_mux_end_ib() argument
542 amdgpu_mcbp_handle_trailing_fence_irq(struct amdgpu_ring_mux * mux) amdgpu_mcbp_handle_trailing_fence_irq() argument
[all...]
/linux/sound/soc/codecs/
H A Dtas5086.c550 /* Input mux controls */
575 /* Output mux controls */
577 { "Channel 1 Mux", "Channel 2 Mux", "Channel 3 Mux",
578 "Channel 4 Mux", "Channel 5 Mux", "Channel 6 Mux" };
615 SND_SOC_DAPM_MUX("Channel 1 Mux", SND_SOC_NOPM, 0, 0,
617 SND_SOC_DAPM_MUX("Channel 2 Mux", SND_SOC_NOP
[all...]
H A Drt5665.c952 SOC_DAPM_ENUM("IF1_1 01 ADC Swap Mux", rt5665_if1_1_01_adc_enum);
955 SOC_DAPM_ENUM("IF1_1 23 ADC Swap Mux", rt5665_if1_1_23_adc_enum);
958 SOC_DAPM_ENUM("IF1_1 45 ADC Swap Mux", rt5665_if1_1_45_adc_enum);
961 SOC_DAPM_ENUM("IF1_1 67 ADC Swap Mux", rt5665_if1_1_67_adc_enum);
964 SOC_DAPM_ENUM("IF1_2 01 ADC Swap Mux", rt5665_if1_2_01_adc_enum);
967 SOC_DAPM_ENUM("IF1_2 23 ADC1 Swap Mux", rt5665_if1_2_23_adc_enum);
970 SOC_DAPM_ENUM("IF1_2 45 ADC1 Swap Mux", rt5665_if1_2_45_adc_enum);
973 SOC_DAPM_ENUM("IF1_2 67 ADC1 Swap Mux", rt5665_if1_2_67_adc_enum);
1780 "DD Mux", "ADC"
1848 SOC_DAPM_ENUM("Stereo1 DMIC Mux", rt5665_sto1_dmic_enu
[all...]
H A Drt5677.c1737 /* Mux */
2884 /* ADC Mux */
2885 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
2887 SND_SOC_DAPM_MUX("Stereo1 ADC1 Mux", SND_SOC_NOPM, 0, 0,
2889 SND_SOC_DAPM_MUX("Stereo1 ADC2 Mux", SND_SOC_NOPM, 0, 0,
2891 SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0,
2893 SND_SOC_DAPM_MUX("Stereo2 ADC1 Mux", SND_SOC_NOPM, 0, 0,
2895 SND_SOC_DAPM_MUX("Stereo2 ADC2 Mux", SND_SOC_NOPM, 0, 0,
2897 SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0,
2899 SND_SOC_DAPM_MUX("Stereo3 DMIC Mux", SND_SOC_NOP
[all...]
/linux/include/linux/mux/
H A Ddriver.h3 * mux/driver.h - definitions for the multiplexer driver interface
13 #include <dt-bindings/mux/mux.h>
22 * struct mux_control_ops - Mux controller operations for a mux chip.
23 * @set: Set the state of the given mux controller.
26 int (*set)(struct mux_control *mux, int state);
30 * struct mux_control - Represents a mux controller.
31 * @lock: Protects the mux controller state.
32 * @chip: The mux chi
104 mux_control_get_index(struct mux_control * mux) mux_control_get_index() argument
[all...]
/linux/drivers/clk/
H A Dclk-mux.c27 static inline u32 clk_mux_readl(struct clk_mux *mux) in clk_mux_readl() argument
29 if (mux->flags & CLK_MUX_BIG_ENDIAN) in clk_mux_readl()
30 return ioread32be(mux->reg); in clk_mux_readl()
32 return readl(mux->reg); in clk_mux_readl()
35 static inline void clk_mux_writel(struct clk_mux *mux, u32 val) in clk_mux_writel() argument
37 if (mux->flags & CLK_MUX_BIG_ENDIAN) in clk_mux_writel()
38 iowrite32be(val, mux->reg); in clk_mux_writel()
40 writel(val, mux->reg); in clk_mux_writel()
90 struct clk_mux *mux = to_clk_mux(hw); in clk_mux_get_parent() local
93 val = clk_mux_readl(mux) >> mu in clk_mux_get_parent()
101 struct clk_mux *mux = to_clk_mux(hw); clk_mux_set_parent() local
132 struct clk_mux *mux = to_clk_mux(hw); clk_mux_determine_rate() local
157 struct clk_mux *mux; __clk_hw_register_mux() local
262 struct clk_mux *mux; clk_unregister_mux() local
278 struct clk_mux *mux; clk_hw_unregister_mux() local
[all...]
/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-wpcm450.dtsi172 smb3_pins: mux-smb3 {
177 smb4_pins: mux-smb4 {
182 smb5_pins: mux-smb5 {
187 scs1_pins: mux-scs1 {
192 scs2_pins: mux-scs2 {
197 scs3_pins: mux-scs3 {
202 smb0_pins: mux-smb0 {
207 smb1_pins: mux-smb1 {
212 smb2_pins: mux-smb2 {
217 bsp_pins: mux
[all...]
/linux/Documentation/devicetree/bindings/net/
H A Dmdio-mux-multiplexer.yaml4 $id: http://devicetree.org/schemas/net/mdio-mux-multiplexer.yaml#
13 This is a special case of MDIO mux when MDIO mux is defined as a consumer
14 of a mux producer device. The mux producer can be of any type like mmio mux
15 producer, gpio mux producer or generic register based mux producer.
19 - $ref: /schemas/net/mdio-mux.yaml#
23 const: mdio-mux
[all...]
/linux/Documentation/i2c/
H A Di2c-topology.rst10 1. A mux may be needed on the bus to prevent address collisions.
25 I2C transfers, and all adapters with a parent are part of an "i2c-mux"
28 Depending of the particular mux driver, something happens when there is
29 an I2C transfer on one of its child adapters. The mux driver can
30 obviously operate a mux, but it can also do arbitration with an external
31 bus master or open a gate. The mux driver has two operations for this,
40 mux-locked or parent-locked muxes.
43 Mux-locked muxes
46 Mux-locked muxes does not lock the entire parent adapter during the
48 adapter are locked. Mux
[all...]
/linux/include/dt-bindings/clock/
H A Dtegra186-clock.h384 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2S2 */
386 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2S3 */
388 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SPDF_IN */
392 /** @clkdesc{spi_clks, out, mux, CLK_RST_CONTROLLER_CLK_SOURCE_SPI3} */
394 /** @clkdesc{i2c_clks, out, mux, CLK_RST_CONTROLLER_CLK_SOURCE_I2C1} */
396 /** @clkdesc{i2c_clks, out, mux, CLK_RST_CONTROLLER_CLK_SOURCE_I2C5} */
398 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SPI1 */
400 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_ISP */
402 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_VI */
404 /** @brief output of mux controlle
[all...]
/linux/drivers/clk/sophgo/
H A Dclk-cv18xx-ip.c386 /* MUX */
396 struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw); in mux_enable() local
398 return cv1800_clk_setbit(&mux->common, &mux->gate); in mux_enable()
403 struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw); in mux_disable() local
405 cv1800_clk_clearbit(&mux->common, &mux->gate); in mux_disable()
410 struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw); in mux_is_enabled() local
412 return cv1800_clk_checkbit(&mux->common, &mux in mux_is_enabled()
418 struct cv1800_clk_mux *mux = data; mux_round_rate() local
427 struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw); mux_determine_rate() local
436 struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw); mux_recalc_rate() local
450 struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw); mux_set_rate() local
461 struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw); mux_get_parent() local
467 _mux_set_parent(struct cv1800_clk_mux * mux,u8 index) _mux_set_parent() argument
480 struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw); mux_set_parent() local
508 struct cv1800_clk_mux *mux = hw_to_cv1800_clk_mux(hw); hw_to_cv1800_clk_bypass_mux() local
517 struct cv1800_clk_bypass_mux *mux = data; bypass_mux_round_rate() local
536 struct cv1800_clk_bypass_mux *mux = hw_to_cv1800_clk_bypass_mux(hw); bypass_mux_determine_rate() local
545 struct cv1800_clk_bypass_mux *mux = hw_to_cv1800_clk_bypass_mux(hw); bypass_mux_recalc_rate() local
556 struct cv1800_clk_bypass_mux *mux = hw_to_cv1800_clk_bypass_mux(hw); bypass_mux_set_rate() local
566 struct cv1800_clk_bypass_mux *mux = hw_to_cv1800_clk_bypass_mux(hw); bypass_mux_get_parent() local
576 struct cv1800_clk_bypass_mux *mux = hw_to_cv1800_clk_bypass_mux(hw); bypass_mux_set_parent() local
719 struct cv1800_clk_regfield *mux; mmux_get_parent() local
740 struct cv1800_clk_regfield *mux; mmux_set_parent() local
[all...]
/linux/net/kcm/
H A Dkcmsock.c60 struct kcm_mux *mux = psock->mux; in kcm_abort_tx_psock() local
64 spin_lock_bh(&mux->lock); in kcm_abort_tx_psock()
67 spin_unlock_bh(&mux->lock); in kcm_abort_tx_psock()
88 spin_unlock_bh(&mux->lock); in kcm_abort_tx_psock()
94 /* RX mux lock held. */
95 static void kcm_update_rx_mux_stats(struct kcm_mux *mux, in kcm_update_rx_mux_stats() argument
98 STRP_STATS_ADD(mux->stats.rx_bytes, in kcm_update_rx_mux_stats()
101 mux->stats.rx_msgs += in kcm_update_rx_mux_stats()
107 static void kcm_update_tx_mux_stats(struct kcm_mux *mux, in kcm_update_tx_mux_stats() argument
110 KCM_STATS_ADD(mux->stats.tx_bytes, in kcm_update_tx_mux_stats()
[all …]
/linux/drivers/clk/qcom/
H A Dclk-krait.c23 static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel) in __krait_mux_set_sel() argument
30 regval = krait_get_l2_indirect_reg(mux->offset); in __krait_mux_set_sel()
33 if (mux->disable_sec_src_gating) { in __krait_mux_set_sel()
35 krait_set_l2_indirect_reg(mux->offset, regval); in __krait_mux_set_sel()
38 regval &= ~(mux->mask << mux->shift); in __krait_mux_set_sel()
39 regval |= (sel & mux->mask) << mux->shift; in __krait_mux_set_sel()
40 if (mux->lpl) { in __krait_mux_set_sel()
41 regval &= ~(mux in __krait_mux_set_sel()
65 struct krait_mux_clk *mux = to_krait_mux_clk(hw); krait_mux_set_parent() local
81 struct krait_mux_clk *mux = to_krait_mux_clk(hw); krait_mux_get_parent() local
[all...]

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