| /linux/Documentation/admin-guide/RAS/ |
| H A D | main.rst | 404 |->mc0
412 .../mc/mc0/
450 │ ├── mc0
707 EDAC MC0: CE page 0x283, offset 0xce0, grain 8, syndrome 0x6ec3, row 0, channel 1 "DIMM_B1": amd76x_edac
708 EDAC MC0: CE page 0x1e5, offset 0xfb0, grain 8, syndrome 0xb741, row 0, channel 1 "DIMM_B1": amd76x_edac
716 | The memory controller | MC0 |
1061 echo 2 >/sys/devices/system/edac/mc/mc0/inject_addrmatch/dimm
1062 echo 1 >/sys/devices/system/edac/mc/mc0/inject_addrmatch/rank
1066 echo any >/sys/devices/system/edac/mc/mc0/inject_addrmatch/dimm
1067 echo any >/sys/devices/system/edac/mc/mc0/inject_addrmatc
[all...] |
| /linux/drivers/scsi/csiostor/ |
| H A D | csio_hw_t5.c | 336 * csio_t5_dfs_create_ext_mem - setup debugfs for MC0 or MC1 to read the values
340 * MC0 & MC1.
350 csio_add_debugfs_mem(hw, "mc0", MEM_MC0, in csio_t5_dfs_create_ext_mem()
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| /linux/arch/arm/boot/dts/st/ |
| H A D | ste-dbx5x0-pinctrl.dtsi | 252 function = "mc0";
307 function = "mc0";
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| H A D | ste-snowball.dts | 533 function = "mc0";
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| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | nvidia,tegra186-mc.yaml | 326 <0x0 0x02c20000 0x0 0x10000>, /* MC0 */
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| /linux/drivers/gpu/drm/msm/adreno/ |
| H A D | a6xx_catalog.c | 907 { .name = "MC0", .buswidth = 4 },
1413 { .name = "MC0", .buswidth = 4 },
1473 { .name = "MC0", .buswidth = 4 },
1505 { .name = "MC0", .buswidth = 4 },
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| H A D | a6xx_hfi.c | 611 msg->ddr_cmds_addrs[1] = cmd_db_read_addr("MC0"); in a730_build_bw_table()
667 msg->ddr_cmds_addrs[1] = cmd_db_read_addr("MC0"); in a740_build_bw_table()
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| /linux/Documentation/driver-api/ |
| H A D | edac.rst | 235 mc0 - CPU MC node 0
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| /linux/drivers/edac/ |
| H A D | mce_amd.c | 294 pr_emerg(HW_ERR "MC0 Error: "); in decode_mc0_mce()
307 pr_emerg(HW_ERR "Corrupted MC0 MCE info?\n"); in decode_mc0_mce()
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| H A D | sb_edac.c | 587 * MC0 is mapped to CH3,4,5 and MC1 is mapped to CH0,1,2
3006 * MC0 channels 0-2 are device 9 function 2-4, in knl_mci_bind_devs()
3167 * bank15 means mc0 and bank16 means mc1. in sbridge_mce_output_error()
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| /linux/drivers/interconnect/qcom/ |
| H A D | sdx65.c | 615 .name = "MC0",
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| H A D | sm8450.c | 1396 .name = "MC0",
1509 .name = "MC0",
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| H A D | qdu1000.c | 812 .name = "MC0",
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| H A D | qcs615.c | 1100 .name = "MC0",
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| H A D | sdm670.c | 1057 .name = "MC0",
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| H A D | sm6350.c | 1263 .name = "MC0",
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| H A D | sm7150.c | 1193 .name = "MC0",
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| H A D | sm8550.c | 1187 .name = "MC0",
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| H A D | sdm845.c | 1275 .name = "MC0",
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| H A D | sc7180.c | 1248 .name = "MC0",
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| H A D | sm8350.c | 1367 .name = "MC0",
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| H A D | sm8750.c | 1258 .name = "MC0",
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| /linux/drivers/pinctrl/nomadik/ |
| H A D | pinctrl-nomadik-db8500.c | 857 DB8500_FUNC_GROUPS(mc0, "mc0_a_1", "mc0_a_2", "mc0_dat47_a_1", "mc0dat31dir_a_1");
935 FUNCTION(mc0),
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| /linux/drivers/net/ethernet/smsc/ |
| H A D | epic100.c | 198 MC0=80, /* Multicast filter table. */ enumerator
1386 ew16(MC0 + i*4, ((u16 *)mc_filter)[i]); in set_rx_mode()
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| /linux/drivers/accel/habanalabs/gaudi2/ |
| H A D | gaudi2_coresight.c | 2698 /* Set HBM (MC0 and MC1) disable components */ in gaudi2_coresight_init()
2702 dev_err(hdev->dev, "Failed to set disabled cs_dbg units for hbm mc0 coresight\n"); in gaudi2_coresight_init()
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