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/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,m31-eusb2-phy.yaml73 resets = <&gcc_qusb2phy_prim_bcr>;
H A Dqcom,snps-eusb2-phy.yaml87 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
H A Dqcom,qusb2-phy.yaml203 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
/linux/include/dt-bindings/clock/
H A Dqcom,gcc-sdm660.h146 #define GCC_QUSB2PHY_PRIM_BCR 0 macro
H A Dqcom,gcc-sc7180.h144 #define GCC_QUSB2PHY_PRIM_BCR 0 macro
H A Dqcom,qdu1000-gcc.h158 #define GCC_QUSB2PHY_PRIM_BCR 13 macro
H A Dqcom,gcc-qcm2290.h174 #define GCC_QUSB2PHY_PRIM_BCR 14 macro
H A Dqcom,gcc-sm6350.h159 #define GCC_QUSB2PHY_PRIM_BCR 0 macro
H A Dqcom,sm7150-gcc.h171 #define GCC_QUSB2PHY_PRIM_BCR 9 macro
H A Dqcom,sar2130p-gcc.h156 #define GCC_QUSB2PHY_PRIM_BCR 19 macro
H A Dqcom,gcc-sm6115.h177 #define GCC_QUSB2PHY_PRIM_BCR 0 macro
H A Dqcom,qcs615-gcc.h180 #define GCC_QUSB2PHY_PRIM_BCR 1 macro
H A Dqcom,sm4450-gcc.h178 #define GCC_QUSB2PHY_PRIM_BCR 14 macro
H A Dqcom,gcc-sc7280.h213 #define GCC_QUSB2PHY_PRIM_BCR 4 macro
H A Dqcom,milos-gcc.h188 #define GCC_QUSB2PHY_PRIM_BCR 17 macro
H A Dqcom,sm8750-gcc.h208 #define GCC_QUSB2PHY_PRIM_BCR 17 macro
H A Dqcom,sm6375-gcc.h210 #define GCC_QUSB2PHY_PRIM_BCR 9 macro
H A Dqcom,gcc-sm6125.h231 #define GCC_QUSB2PHY_PRIM_BCR 0 macro
H A Dqcom,sm8550-gcc.h204 #define GCC_QUSB2PHY_PRIM_BCR 20 macro
H A Dqcom,gcc-sm8450.h223 #define GCC_QUSB2PHY_PRIM_BCR 21 macro
H A Dqcom,sm8650-gcc.h228 #define GCC_QUSB2PHY_PRIM_BCR 21 macro
H A Dqcom,gcc-sm8150.h228 #define GCC_QUSB2PHY_PRIM_BCR 15 macro
H A Dqcom,gcc-sdm845.h213 #define GCC_QUSB2PHY_PRIM_BCR 8 macro
H A Dqcom,gcc-sm8250.h239 #define GCC_QUSB2PHY_PRIM_BCR 27 macro
H A Dqcom,gcc-sm8350.h234 #define GCC_QUSB2PHY_PRIM_BCR 20 macro

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