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/linux-5.10/Documentation/devicetree/bindings/arm/
Dpsci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
15 processors") can be used by Linux to initiate various CPU-centric power
18 Issue A of the specification describes functions for CPU suspend, hotplug
25 r0 => 32-bit Function ID / return value
26 {r1 - r3} => Parameters
40 - description:
44 - description:
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/linux-5.10/Documentation/admin-guide/mm/
Dnumaperf.rst9 as CPU cache coherence, but may have different performance. For example,
14 characteristics. Some memory may share the same node as a CPU, and others
20 +------------------+ +------------------+
21 | Compute Node 0 +-----+ Compute Node 1 |
23 +--------+---------+ +--------+---------+
25 +--------+---------+ +--------+---------+
27 +------------------+ +--------+---------+
35 performance when accessing a given memory target. Each initiator-target
47 # symlinks -v /sys/devices/system/node/nodeX/access0/targets/
48 relative: /sys/devices/system/node/nodeX/access0/targets/nodeY -> ../../nodeY
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/linux-5.10/drivers/char/agp/
Damd64-agp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2001-2003 SuSE Labs.
6 * This is a GART driver for the AMD Opteron/Athlon64 on-CPU northbridge.
50 struct agp_bridge_data *bridge = mem->bridge; in amd64_insert_memory()
55 if (type != mem->type) in amd64_insert_memory()
56 return -EINVAL; in amd64_insert_memory()
57 mask_type = bridge->driver->agp_type_to_mask_type(bridge, type); in amd64_insert_memory()
59 return -EINVAL; in amd64_insert_memory()
64 if (((unsigned long)pg_start + mem->page_count) > num_entries) in amd64_insert_memory()
65 return -EINVAL; in amd64_insert_memory()
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/linux-5.10/arch/arm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
129 The ARM series is a line of low-power-consumption RISC chip designs
131 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
132 manufactured, but legacy ARM-based PC hardware remains popular in
242 Patch phys-to-virt and virt-to-phys translation functions at
246 This can only be used with non-XIP MMU kernels where the base
292 bool "MMU-based Paged Memory Management Support"
295 Select if you want MMU-based virtualised addressing space
334 bool "ARMv7-M based platforms (Cortex-M0/M3/M4)"
347 bool "EBSA-110"
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/linux-5.10/drivers/scsi/lpfc/
Dlpfc.h4 * Copyright (C) 2017-2020 Broadcom. All Rights Reserved. The term *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
66 #define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */
104 /* Number of MSI-X vectors the driver uses */
130 * Provide for FC4 TYPE x28 - NVME. The
328 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */
329 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue
332 LPFC_HBA_ERROR = -1
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Dlpfc_init.c4 * Copyright (C) 2017-2020 Broadcom. All Rights Reserved. The term *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
26 #include <linux/dma-mapping.h>
43 #include <linux/cpu.h>
69 /* Used when mapping IRQ vectors in a driver centric manner */
103 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
112 * 0 - success.
113 * -ERESTART - requests the SLI layer to reset the HBA and try again.
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Dlpfc_attr.c4 * Copyright (C) 2017-2020 Broadcom. All Rights Reserved. The term *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
74 " trunk - link was \"low\" speed",
76 " existing trunk - link was \"middle\" speed",
78 " trunk - link was \"high\" speed",
79 "Attached to non-trunking port - F_Port",
80 "Attached to non-trunking port - N_Port",
82 "non-FLOGI frame received",
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/linux-5.10/tools/memory-model/Documentation/
Dexplanation.txt1 Explanation of the Linux-Kernel Memory Consistency Model
15 7. THE PROGRAM ORDER RELATION: po AND po-loc
18 10. THE READS-FROM RELATION: rf, rfi, and rfe
20 12. THE FROM-READS RELATION: fr, fri, and fre
22 14. PROPAGATION ORDER RELATION: cumul-fence
28 20. THE HAPPENS-BEFORE RELATION: hb
29 21. THE PROPAGATES-BEFORE RELATION: pb
30 22. RCU RELATIONS: rcu-link, rcu-gp, rcu-rscsi, rcu-order, rcu-fence, and rb
38 ------------
40 The Linux-kernel memory consistency model (LKMM) is rather complex and
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/linux-5.10/drivers/base/power/
Ddomain.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/base/power/domain.c - Common code related to device power domains.
23 #include <linux/cpu.h>
34 __routine = genpd->dev_ops.callback; \
53 mutex_lock(&genpd->mlock); in genpd_lock_mtx()
59 mutex_lock_nested(&genpd->mlock, depth); in genpd_lock_nested_mtx()
64 return mutex_lock_interruptible(&genpd->mlock); in genpd_lock_interruptible_mtx()
69 return mutex_unlock(&genpd->mlock); in genpd_unlock_mtx()
80 __acquires(&genpd->slock) in genpd_lock_spin()
84 spin_lock_irqsave(&genpd->slock, flags); in genpd_lock_spin()
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/linux-5.10/Documentation/sparc/oradax/
Ddax-hv-api.txt3 Publication date 2017-09-25 08:21
5 Extracted via "pdftotext -f 547 -l 572 -layout sun4v_20170925.pdf"
16 live-migration and other system management activities.
20 …high speed processoring of database-centric operations. The coprocessors may support one or more of
28 …e Completion Area and, unless execution order is specifically restricted through the use of serial-
45 …device node in the guest MD (Section 8.24.17, “Database Analytics Accelerators (DAX) virtual-device
51 36.1.1.1. "ORCL,sun4v-dax" Device Compatibility
54 • No-op/Sync
81 36.1.1.2. "ORCL,sun4v-dax-fc" Device Compatibility
82 … "ORCL,sun4v-dax-fc" is compatible with the "ORCL,sun4v-dax" interface, and includes additional CCB
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/linux-5.10/drivers/gpu/drm/i915/
Di915_perf.c2 * Copyright © 2015-2016 Intel Corporation
40 * captured by DMA from the GPU, unsynchronized with and unrelated to the CPU.
44 * without special privileges. Access to system-wide metrics requires root
58 * might sample sets of tightly-coupled counters, depending on the
70 * interleaved with event-type specific members.
74 * with the CPU, using HW specific packing formats for counter sets. Sometimes
76 * would be acceptable to expose them to unprivileged applications - to hide
88 * into perf's currently cpu centric design.
96 * side-band OA data captured via MI_REPORT_PERF_COUNT commands; we're
102 * For posterity, in case we might re-visit trying to adapt core perf to be
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