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/linux/Documentation/devicetree/bindings/regulator/
H A Dmediatek,mt6397-regulator.yaml86 regulator-enable-ramp-delay = <115>;
94 regulator-enable-ramp-delay = <115>;
102 regulator-enable-ramp-delay = <115>;
110 regulator-enable-ramp-delay = <115>;
118 regulator-enable-ramp-delay = <115>;
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt8516.c137 MTK_PIN_DRV_GRP(115, 0xd60, 12, 2),
180 MTK_PIN_PUPD_SPEC_SR(115, 0xe20, 2, 1, 0),
228 MTK_PIN_IES_SMT_SPEC(115, 115, 0x920, 1),
278 MTK_PIN_IES_SMT_SPEC(115, 115, 0xA20, 1),
H A Dpinctrl-mt8167.c137 MTK_PIN_DRV_GRP(115, 0xd60, 12, 2),
180 MTK_PIN_PUPD_SPEC_SR(115, 0xe20, 2, 1, 0),
228 MTK_PIN_IES_SMT_SPEC(115, 115, 0x920, 1),
278 MTK_PIN_IES_SMT_SPEC(115, 115, 0xA20, 1),
/linux/drivers/media/usb/gspca/
H A Dsn9c20x.c297 112, 113, 114, 115, 116, 117, 118, 119,
304 119, 118, 117, 116, 115, 114, 112, 111,
319 -107, -108, -109, -110, -112, -113, -114, -115,
327 -115, -114, -112, -111, -110, -109, -107, -106,
352 -112, -113, -114, -115, -116, -117, -119, -120,
359 -121, -120, -119, -118, -117, -116, -115, -114,
374 106, 108, 109, 110, 112, 113, 114, 115,
382 117, 116, 115, 114, 113, 111, 110, 109,
392 -116, -115, -114, -113, -112, -111, -110, -109,
408 109, 111, 112, 113, 113, 114, 115, 11
[all...]
/linux/drivers/regulator/
H A D88pm886-regulator.c288 .n_voltages = 115,
302 .n_voltages = 115,
316 .n_voltages = 115,
330 .n_voltages = 115,
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65-wakeup.dtsi77 clocks = <&k3_clks 115 1>;
78 power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
/linux/Documentation/devicetree/bindings/mfd/
H A Dadi,adp5585.yaml82 maximum: 115
253 maximum: 115
260 maximum: 115
/linux/drivers/pinctrl/uniphier/
H A Dpinctrl-uniphier-sld8.c360 UNIPHIER_PINCTRL_PIN(115, "RXD1", 0,
412 115, UNIPHIER_PIN_DRV_1BIT,
413 115, UNIPHIER_PIN_PULL_DOWN),
520 static const unsigned uart1_pins[] = {114, 115};
530 static const unsigned usb2_pins[] = {114, 115};
542 110, 111, 112, 113, 114, 115, 16, 17, /* PORT9x */
H A Dpinctrl-uniphier-ld11.c306 UNIPHIER_PINCTRL_PIN(115, "HS0VALOUT", UNIPHIER_PIN_IECTRL_EXIST,
307 115, UNIPHIER_PIN_DRV_1BIT,
308 115, UNIPHIER_PIN_PULL_DOWN),
506 static const unsigned hscout0_ci_pins[] = {113, 114, 115, 116, 117, 118, 119,
509 static const unsigned hscout0_p_pins[] = {113, 114, 115, 116, 117, 118, 119,
575 115, 116, 117, 118, 119, 120, 121, 122, /* PORT14x */
H A Dpinctrl-uniphier-ld6b.c360 UNIPHIER_PINCTRL_PIN(115, "TXD1", 0,
361 115, UNIPHIER_PIN_DRV_1BIT,
362 115, UNIPHIER_PIN_PULL_UP),
752 static const unsigned i2c2_pins[] = {115, 116};
777 static const unsigned system_bus_cs4_pins[] = {115};
789 static const unsigned uart1_pins[] = {115, 116};
825 109, 110, 111, 112, 113, 114, 115, 116, /* PORT18x */
/linux/drivers/s390/char/
H A Ddefkeymap.map120 keycode 115 = Ediaeresis three
157 shift control keycode 115 = Incr_Console
/linux/include/dt-bindings/clock/
H A Drk3128-cru.h40 #define SCLK_SDIO_DRV 115
253 #define SRST_HEVC_CORE 115
H A Drv1108-cru.h65 #define SCLK_MAC_REFOUT 115
283 #define PRST_HDMI 115
H A Dqcom,ipq5332-gcc.h116 #define GCC_SDCC1_APPS_CLK_SRC 115
278 #define GCC_SNOC_LPASS_CFG_CLK_ARES 115
H A Drk3308-cru.h119 #define SCLK_I2S2_8CH_RX_SRC 115
341 #define SRST_USBPHYPOR 115
H A Dqcom,gcc-ipq8074.h124 #define GCC_PCIE0_PIPE_CLK 115
353 #define GCC_NSSNOC_QOSGEN_REF_ARES 115
H A Drk3288-cru.h70 #define SCLK_SDIO0_DRV 115
309 #define SRST_MIPIDSI0 115
/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/
H A Dbrg.txt19 reg = <119f0 10 115f0 10>;
/linux/sound/isa/gus/
H A Dgus_tables.h60 127 /* 90 */,123 /* 91 */,119 /* 92 */,115 /* 93 */,111 /* 94 */,
65 37 /* 115 */,33 /* 116 */,30 /* 117 */,27 /* 118 */,24 /* 119 */,
/linux/drivers/cpufreq/
H A Dlonghaul.h185 115, /* 0101 -> 11.5x */
221 115, /* 0101 -> 11.5x */
259 115, /* 0101 -> 11.5x */
294 115, /* 0101 -> 11.5x */
/linux/include/dt-bindings/pinctrl/
H A Dmt8365-pinfunc.h722 #define MT8365_PIN_115_I2S_LRCK__FUNC_GPIO115 (MTK_PIN_NO(115) | 0)
723 #define MT8365_PIN_115_I2S_LRCK__FUNC_I2S0_LRCK (MTK_PIN_NO(115) | 1)
724 #define MT8365_PIN_115_I2S_LRCK__FUNC_I2S1_LRCK (MTK_PIN_NO(115) | 2)
725 #define MT8365_PIN_115_I2S_LRCK__FUNC_I2S2_LRCK (MTK_PIN_NO(115) | 3)
726 #define MT8365_PIN_115_I2S_LRCK__FUNC_I2S3_LRCK (MTK_PIN_NO(115) | 4)
727 #define MT8365_PIN_115_I2S_LRCK__FUNC_PWM_B (MTK_PIN_NO(115) | 5)
728 #define MT8365_PIN_115_I2S_LRCK__FUNC_SPDIF_OUT (MTK_PIN_NO(115) | 6)
729 #define MT8365_PIN_115_I2S_LRCK__FUNC_DBG_MON_B18 (MTK_PIN_NO(115) | 7)
/linux/Documentation/userspace-api/media/v4l/
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/linux/Documentation/devicetree/bindings/iio/light/
H A Dliteon,ltr501.yaml56 interrupts = <115 IRQ_TYPE_EDGE_FALLING>;
/linux/drivers/pinctrl/intel/
H A Dpinctrl-merrifield.c146 PINCTRL_PIN(115, "GP124_UART_0_CTS"),
279 static const unsigned int mrfld_uart0_pins[] = { 115, 116, 117, 118 };
332 TNG_FAMILY(8, 115, 126),
/linux/include/net/
H A Dtls_prot.h63 TLS_ALERT_DESC_UNKNOWN_PSK_IDENTITY = 115,

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