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Searched +full:0 +full:xd2000000 (Results 1 – 7 of 7) sorted by relevance

/linux/Documentation/devicetree/bindings/mtd/
H A Dfsmc-nand.txt15 byte 0 TCLR : CLE to RE delay in number of AHB clock cycles, only 4 bits
32 - bank: default NAND bank to use (0-3 are valid, 0 is the default).
46 reg = <0xd1800000 0x1000 /* FSMC Register */
47 0xd2000000 0x0010 /* NAND Base DATA */
48 0xd2020000 0x001
[all...]
/linux/Documentation/devicetree/bindings/pci/
H A Dintel-gw-pcie.yaml96 reg = <0xd0e00000 0x1000>,
97 <0xd2000000 0x800000>,
98 <0xd0a41000 0x1000>;
100 linux,pci-domain = <0>;
102 bus-range = <0x00 0x0
[all...]
/linux/Documentation/devicetree/bindings/crypto/
H A Dhisilicon,hip06-sec.yaml22 - description: Registers for queue 0
42 - description: Completion interrupt for queue 0
43 - description: Error interrupt for queue 0
96 reg = <0x400 0xd0000000 0x0 0x10000
97 0x400 0xd2000000
[all...]
/linux/arch/arm/boot/dts/st/
H A Dspear600.dtsi12 #address-cells = <0>;
13 #size-cells = <0>;
23 reg = <0 0x40000000>;
30 ranges = <0xd0000000 0xd0000000 0x30000000>;
35 reg = <0xf1100000 0x1000>;
42 reg = <0xf100000
[all...]
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhip07.dtsi23 #size-cells = <0>;
270 reg = <0x10000>;
273 numa-node-id = <0>;
279 reg = <0x10001>;
282 numa-node-id = <0>;
288 reg = <0x10002>;
291 numa-node-id = <0>;
297 reg = <0x10003>;
300 numa-node-id = <0>;
306 reg = <0x1010
[all...]
/linux/crypto/
H A Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x0301010
[all...]
/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_hsi.h17 #define FW_ENCODE_32BIT_PATTERN 0x1e1e1e1e
23 #define BNX2X_MAX_ISCSI_TRGT_CONN_MASK 0xFFFF
24 #define BNX2X_MAX_ISCSI_TRGT_CONN_SHIFT 0
25 #define BNX2X_MAX_ISCSI_INIT_CONN_MASK 0xFFFF0000
31 #define BNX2X_MAX_FCOE_TRGT_CONN_MASK 0xFFFF
32 #define BNX2X_MAX_FCOE_TRGT_CONN_SHIFT 0
33 #define BNX2X_MAX_FCOE_INIT_CONN_MASK 0xFFFF0000
42 #define PIN_CFG_NA 0x00000000
43 #define PIN_CFG_GPIO0_P0 0x00000001
44 #define PIN_CFG_GPIO1_P0 0x0000000
[all...]