Home
last modified time | relevance | path

Searched +full:0 +full:xa000 (Results 1 – 25 of 267) sorted by relevance

1234567891011

/linux/arch/arm64/boot/dts/marvell/mmp/
H A Dpxa1908-samsung-coreprimevelte.dts25 reg = <0 0x17177000 0 (480 * 800 * 4)>;
34 memory@0 {
36 reg = <0 0 0 0>;
45 reg = <0 0x1700000
[all...]
/linux/arch/powerpc/boot/dts/
H A Dmvme5100.dts26 #size-cells = <0>;
30 reg = <0x0>;
44 reg = <0x0 0x20000000>;
51 ranges = <0x0 0xfef80000 0x10000>;
52 reg = <0xfef80000 0x10000>;
57 reg = <0x800
[all...]
H A Dstxssa8555.dts30 #size-cells = <0>;
32 PowerPC,8555@0 {
34 reg = <0x0>;
37 d-cache-size = <0x8000>; // L1, 32K
38 i-cache-size = <0x8000>; // L1, 32K
39 timebase-frequency = <0>; // 33 MHz, from uboot
40 bus-frequency = <0>; // 166 MHz
41 clock-frequency = <0>; // 825 MHz, from uboot
48 reg = <0x00000000 0x1000000
[all...]
/linux/sound/soc/codecs/
H A Drt274.h14 #define RT274_AUDIO_FUNCTION_GROUP 0x01
15 #define RT274_DAC_OUT0 0x02
16 #define RT274_DAC_OUT1 0x03
17 #define RT274_ADC_IN2 0x08
18 #define RT274_ADC_IN1 0x09
19 #define RT274_DIG_CVT 0x0a
20 #define RT274_DMIC1 0x12
21 #define RT274_DMIC2 0x13
22 #define RT274_MIC 0x19
23 #define RT274_LINE1 0x1
[all...]
H A Drt286.h14 #define RT286_AUDIO_FUNCTION_GROUP 0x01
15 #define RT286_DAC_OUT1 0x02
16 #define RT286_DAC_OUT2 0x03
17 #define RT286_ADC_IN1 0x09
18 #define RT286_ADC_IN2 0x08
19 #define RT286_MIXER_IN 0x0b
20 #define RT286_MIXER_OUT1 0x0c
21 #define RT286_MIXER_OUT2 0x0d
22 #define RT286_DMIC1 0x12
23 #define RT286_DMIC2 0x1
[all...]
H A Drt298.h14 #define RT298_AUDIO_FUNCTION_GROUP 0x01
15 #define RT298_DAC_OUT1 0x02
16 #define RT298_DAC_OUT2 0x03
17 #define RT298_DIG_CVT 0x06
18 #define RT298_ADC_IN1 0x09
19 #define RT298_ADC_IN2 0x08
20 #define RT298_MIXER_IN 0x0b
21 #define RT298_MIXER_OUT1 0x0c
22 #define RT298_MIXER_OUT2 0x0d
23 #define RT298_DMIC1 0x1
[all...]
/linux/drivers/crypto/aspeed/
H A Daspeed-hace.h19 #define ASPEED_HACE_SRC 0x00 /* Crypto Data Source Base Address Register */
20 #define ASPEED_HACE_DEST 0x04 /* Crypto Data Destination Base Address Register */
21 #define ASPEED_HACE_CONTEXT 0x08 /* Crypto Context Buffer Base Address Register */
22 #define ASPEED_HACE_DATA_LEN 0x0C /* Crypto Data Length Register */
23 #define ASPEED_HACE_CMD 0x10 /* Crypto Engine Command Register */
26 #define ASPEED_HACE_TAG 0x18 /* HACE Tag Register */
28 #define ASPEED_HACE_GCM_ADD_LEN 0x14 /* Crypto AES-GCM Additional Data Length Register */
29 #define ASPEED_HACE_GCM_TAG_BASE_ADDR 0x18 /* Crypto AES-GCM Tag Write Buff Base Address Reg */
31 #define ASPEED_HACE_STS 0x1C /* HACE Status Register */
33 #define ASPEED_HACE_HASH_SRC 0x2
[all...]
/linux/drivers/net/usb/
H A Dr8153_ecm.c10 #define OCP_BASE 0xe86c
26 if (ret < 0) in pla_read_word()
31 ret &= 0xffff; in pla_read_word()
39 u32 mask = 0xffff; in pla_write_word()
58 if (ret < 0) in pla_write_word()
76 ret = pla_write_word(dev, OCP_BASE, 0xa000); in r8153_ecm_mdio_read()
77 if (ret < 0) in r8153_ecm_mdio_read()
80 ret = pla_read_word(dev, 0xb400 + reg * 2); in r8153_ecm_mdio_read()
91 ret = pla_write_word(dev, OCP_BASE, 0xa00 in r8153_ecm_mdio_write()
[all...]
/linux/arch/mips/sgi-ip22/
H A Dip22-nvram.c13 #define EEPROM_READ 0xc000 /* serial memory read */
14 #define EEPROM_WEN 0x9800 /* write enable before prog modes */
15 #define EEPROM_WRITE 0xa000 /* serial memory write */
16 #define EEPROM_WRALL 0x8800 /* write all registers */
17 #define EEPROM_WDS 0x8000 /* disable all programming */
18 #define EEPROM_PRREAD 0xc000 /* read protect register */
19 #define EEPROM_PREN 0x9800 /* enable protect register mode */
20 #define EEPROM_PRCLEAR 0xffff /* clear protect register */
21 #define EEPROM_PRWRITE 0xa00
[all...]
/linux/drivers/staging/media/atomisp/pci/
H A Dif_defs.h10 #define HIVE_IF_FRAME_REQUEST 0xA000
11 #define HIVE_IF_LINES_REQUEST 0xB000
12 #define HIVE_IF_VECTORS_REQUEST 0xC000
/linux/arch/arm/boot/dts/nxp/lpc/
H A Dlpc4357.dtsi18 cpu@0 {
26 reg = <0x10000000 0x8000>; /* 32 KiB local SRAM */
31 reg = <0x10080000 0xa000>; /* 32 + 8 KiB local SRAM */
36 reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
/linux/arch/arm64/boot/dts/freescale/
H A Ds32g2.dtsi24 reg = <0x0 0xd0000000 0x0 0x80>;
31 #size-cells = <0>;
33 cpu0: cpu@0 {
36 reg = <0x0>;
44 reg = <0x1>;
52 reg = <0x100>;
60 reg = <0x10
[all...]
H A Ds32g3.dtsi15 #address-cells = <0x02>;
16 #size-cells = <0x02>;
20 #size-cells = <0>;
60 cpu0: cpu@0 {
63 reg = <0x0>;
65 clocks = <&dfs 0>;
71 reg = <0x1>;
73 clocks = <&dfs 0>;
79 reg = <0x2>;
81 clocks = <&dfs 0>;
[all...]
/linux/Documentation/devicetree/bindings/mailbox/
H A Dxgene-slimpro-mailbox.txt14 - interrupts: 8 interrupts must be from 0 to 7, interrupt 0 define the
15 the interrupt for mailbox channel 0 and interrupt 1 for
25 reg = <0x0 0x10540000 0x0 0xa000>;
27 interrupts = <0x0 0x
[all...]
/linux/arch/arm/boot/dts/qcom/
H A Dpm8841.dtsi10 polling-delay = <0>;
40 reg = <0x4 SPMI_USID>;
42 #size-cells = <0>;
46 reg = <0xa000>;
49 gpio-ranges = <&pm8841_mpps 0 0 4>;
56 reg = <0x2400>;
57 interrupts = <4 0x24 0 IRQ_TYPE_EDGE_RISIN
[all...]
H A Dpma8084.dtsi9 pma8084_0: pma8084@0 {
11 reg = <0x0 SPMI_USID>;
13 #size-cells = <0>;
17 reg = <0x6000>,
18 <0x6100>;
20 interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
25 reg = <0x800>;
29 interrupts = <0x
[all...]
/linux/arch/arm64/boot/dts/qcom/
H A Dpmi8994.dtsi9 reg = <0x2 SPMI_USID>;
11 #size-cells = <0>;
15 reg = <0xc000>;
17 gpio-ranges = <&pmi8994_gpios 0 0 10>;
25 reg = <0xa000>;
27 gpio-ranges = <&pmi8994_mpps 0 0 4>;
36 reg = <0x
[all...]
/linux/Documentation/i2c/
H A Dten-bit-addresses.rst7 do not intersect: the 7 bit address 0x10 is not the same as the 10 bit
8 address 0x10 (though a single device could respond to both of them).
10 address space, namely 0xa000-0xa3ff. The leading 0xa (= 10) represents the
/linux/drivers/pinctrl/qcom/
H A Dpinctrl-lpass-lpi.h18 #define LPI_SLEW_RATE_CTL_REG 0xa000
19 #define LPI_TLMM_REG_OFFSET 0x1000
20 #define LPI_SLEW_RATE_MAX 0x03
21 #define LPI_SLEW_BITS_SIZE 0x02
22 #define LPI_SLEW_RATE_MASK GENMASK(1, 0)
23 #define LPI_GPIO_CFG_REG 0x00
24 #define LPI_GPIO_PULL_MASK GENMASK(1, 0)
28 #define LPI_GPIO_VALUE_REG 0x04
29 #define LPI_GPIO_VALUE_IN_MASK BIT(0)
[all...]
/linux/arch/arm64/include/asm/
H A Ddebug-monitors.h18 #define DBG_ESR_EVT(x) (((x) >> 27) & 0x7)
21 #define DBG_ESR_EVT_HWBP 0x0
22 #define DBG_ESR_EVT_HWSS 0x1
23 #define DBG_ESR_EVT_HWWP 0x2
24 #define DBG_ESR_EVT_BRK 0x6
43 #define DBG_ESR_EVT_BKPT 0x4
44 #define DBG_ESR_EVT_VECC 0x5
46 #define AARCH32_BREAK_ARM 0x07f001f0
47 #define AARCH32_BREAK_THUMB 0xde01
48 #define AARCH32_BREAK_THUMB2_LO 0xf7f
[all...]
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sm8450-gpucc.yaml66 reg = <0 0x03d90000 0 0xa000>;
/linux/drivers/gpu/drm/i915/
H A Di915_reg_defs.h29 #define IS_POWER_OF_2(__x) ((__x) && (((__x) & ((__x) - 1)) == 0))
44 BUILD_BUG_ON_ZERO((__mask) == 0 || (__mask) > U32_MAX) + \
46 BUILD_BUG_ON_ZERO(__builtin_choose_expr(__is_constexpr(__val), (~((__mask) >> __bf_shf(__mask)) & (__val)), 0))))
61 BUILD_BUG_ON_ZERO((__mask) == 0 || (__mask) > U8_MAX) + \
63 BUILD_BUG_ON_ZERO(__builtin_choose_expr(__is_constexpr(__val), (~((__mask) >> __bf_shf(__mask)) & (__val)), 0))))
104 BUILD_BUG_ON_ZERO((__mask) == 0 || (__mask) > U16_MAX) + \
106 BUILD_BUG_ON_ZERO(__builtin_choose_expr(__is_constexpr(__val), (~((__mask) >> __bf_shf(__mask)) & (__val)), 0))))
111 BUILD_BUG_ON_MSG(((mask) & 0xffff0000), "Incorrect mask"); \
113 BUILD_BUG_ON_MSG((value) & 0xffff0000, "Incorrect value"); \
119 #define _MASKED_BIT_DISABLE(a) (_MASKED_FIELD((a), 0))
[all...]
/linux/drivers/usb/storage/
H A Dunusual_datafab.h9 UNUSUAL_DEV( 0x07c4, 0xa000, 0x0000, 0x0015,
13 0),
17 * using the current driver...the 0xffff is arbitrary since I
20 * The 0xa003 and 0xa004 devices in particular I'm curious about.
26 UNUSUAL_DEV( 0x07c
[all...]
/linux/drivers/net/ethernet/apm/xgene-v2/
H A Dmac.h14 #define MAC_CONFIG_1 0xa000
15 #define MAC_CONFIG_2 0xa004
16 #define MII_MGMT_CONFIG 0xa020
17 #define MII_MGMT_COMMAND 0xa024
18 #define MII_MGMT_ADDRESS 0xa028
19 #define MII_MGMT_CONTROL 0xa02c
20 #define MII_MGMT_STATUS 0xa030
21 #define MII_MGMT_INDICATORS 0xa034
22 #define INTERFACE_CONTROL 0xa03
[all...]
/linux/drivers/parport/
H A Dparport_serial.c25 titan_110l = 0,
102 dev->subsystem_device == 0x0299) in netmos_parallel_init()
110 * and serial ports. The form is 0x00PS, where <P> is the number of in netmos_parallel_init()
113 par->numports = (dev->subsystem_device & 0xf0) >> 4; in netmos_parallel_init()
118 return 0; in netmos_parallel_init()
125 /* netmos_9855 */ { 1, { { 0, -1 }, }, netmos_parallel_init },
126 /* netmos_9855_2p */ { 2, { { 0, -1 }, { 2, -1 }, } },
128 /* netmos_9900_2p */ {2, { { 0, 1 }, { 3, 4 }, } },
129 /* netmos_99xx_1p */ {1, { { 0, 1 }, } },
174 PCI_ANY_ID, PCI_ANY_ID, 0,
[all...]

1234567891011