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Searched +full:0 +full:x64000000 (Results 1 – 16 of 16) sorted by relevance

/linux/arch/m68k/include/asm/
H A Dsun3x.h6 #define SUN3X_IOMMU 0x60000000
7 #define SUN3X_ENAREG 0x61000000
8 #define SUN3X_INTREG 0x61001400
9 #define SUN3X_DIAGREG 0x61001800
10 #define SUN3X_ZS1 0x62000000
11 #define SUN3X_ZS2 0x62002000
12 #define SUN3X_LANCE 0x65002000
13 #define SUN3X_EEPROM 0x64000000
14 #define SUN3X_IDPROM 0x640007d
[all...]
H A Dsun3xprom.h18 #define SUN3X_IOMMU 0x60000000
19 #define SUN3X_ENAREG 0x61000000
20 #define SUN3X_INTREG 0x61001400
21 #define SUN3X_DIAGREG 0x61001800
22 #define SUN3X_ZS1 0x62000000
23 #define SUN3X_ZS2 0x62002000
24 #define SUN3X_LANCE 0x65002000
25 #define SUN3X_EEPROM 0x64000000
26 #define SUN3X_IDPROM 0x640007d
[all...]
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dst,stm32-fmc2-ebi.yaml51 <bank-number> 0 <address of the bank> <size>
58 "^.*@[0-4],[a-f0-9]+$":
82 reg = <0x58002000 0x1000>;
86 ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
87 <1 0 0x6400000
[all...]
/linux/arch/powerpc/boot/dts/
H A Da4m072.dts27 ranges = <0 0xf0000000 0x0000c000>;
28 reg = <0xf0000000 0x00000100>;
29 bus-frequency = <0>; /* From boot loader */
30 system-frequency = <0>; /* From boot loader */
33 fsl,init-ext-48mhz-en = <0x0>;
34 fsl,init-fd-enable = <0x01>;
35 fsl,init-fd-counters = <0x333
[all...]
/linux/drivers/video/fbdev/via/
H A Daccel.c19 gemode = readl(engine + VIA_REG_GEMODE) & 0xfffffcfc; in viafb_set_bpp()
35 return 0; in viafb_set_bpp()
44 u32 ge_cmd = 0, tmp, i; in hw_bitblt_1()
54 ge_cmd |= 0x00008000; in hw_bitblt_1()
59 ge_cmd |= 0x00004000; in hw_bitblt_1()
67 case 0x00: /* blackness */ in hw_bitblt_1()
68 case 0x5A: /* pattern inversion */ in hw_bitblt_1()
69 case 0xF0: /* pattern copy */ in hw_bitblt_1()
70 case 0xFF: /* whiteness */ in hw_bitblt_1()
84 if (src_x & (op == VIA_BITBLT_MONO ? 0xFFFF800 in hw_bitblt_1()
[all...]
/linux/drivers/mmc/host/
H A Dowl-mmc.c28 #define OWL_REG_SD_EN 0x0000
29 #define OWL_REG_SD_CTL 0x0004
30 #define OWL_REG_SD_STATE 0x0008
31 #define OWL_REG_SD_CMD 0x000c
32 #define OWL_REG_SD_ARG 0x0010
33 #define OWL_REG_SD_RSPBUF0 0x0014
34 #define OWL_REG_SD_RSPBUF1 0x0018
35 #define OWL_REG_SD_RSPBUF2 0x001c
36 #define OWL_REG_SD_RSPBUF3 0x0020
37 #define OWL_REG_SD_RSPBUF4 0x002
[all...]
/linux/arch/arm64/boot/dts/broadcom/northstar2/
H A Dns2.dtsi33 /memreserve/ 0x81000000 0x00200000;
46 #size-cells = <0>;
48 A57_0: cpu@0 {
51 reg = <0 0>;
59 reg = <0 1>;
67 reg = <0 2>;
75 reg = <0 3>;
80 CLUSTER0_L2: l2-cache@0 {
[all...]
/linux/crypto/
H A Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x0301010
[all...]
/linux/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_srv.c78 #define DMUB_CW0_BASE (0x60000000)
79 #define DMUB_CW1_BASE (0x61000000)
80 #define DMUB_CW3_BASE (0x63000000)
81 #define DMUB_CW4_BASE (0x64000000)
82 #define DMUB_CW5_BASE (0x65000000)
83 #define DMUB_CW6_BASE (0x66000000)
85 #define DMUB_REGION5_BASE (0xA0000000)
86 #define DMUB_REGION6_BASE (0xC0000000)
108 for (pos = 0; po in dmub_flush_buffer_mem()
[all...]
/linux/arch/powerpc/include/asm/
H A Dppc-opcode.h13 #define __REG_R0 0
46 #define __REGA0_0 0
80 #define _R0 0
113 #define IMM_L(i) ((uintptr_t)(i) & 0xffff)
114 #define IMM_DS(i) ((uintptr_t)(i) & 0xfffc)
115 #define IMM_DQ(i) ((uintptr_t)(i) & 0xfff0)
116 #define IMM_D0(i) (((uintptr_t)(i) >> 16) & 0x3ffff)
122 * top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000).
128 (((uintptr_t)(i) & 0x800
[all...]
/linux/drivers/net/wireless/ath/ath9k/
H A Dar5008_phy.c31 #define AR5008_11NA_OFDM_SHIFT 0
55 {0x000098b0, 0x1e5795e5},
56 {0x000098e0, 0x02008020},
61 {0x000098b0, 0x02108421},
62 {0x000098ec, 0x00000008},
67 {0x000098b
[all...]
H A Dar9003_phy.c27 #define AR9300_11NA_OFDM_SHIFT 0
38 /* level: 0 1 2 3 4 5 6 7 8 */
39 { -4, -2, 0, 2, 4, 6, 8, 10, 12 }; /* lvl 0-8, default 2 */
42 /* level: 0 1 2 3 4 5 6 7 8 */
43 { -6, -4, -2, 0, 2, 4, 6, 8 }; /* lvl 0-7, default 3 */
138 * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
142 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0]
[all...]
/linux/arch/arm/boot/dts/st/
H A Dstm32mp131.dtsi16 #size-cells = <0>;
18 cpu0: cpu@0 {
21 reg = <0>;
43 #size-cells = <0>;
44 linaro,optee-channel-id = <0>;
47 reg = <0x14>;
52 reg = <0x16>;
57 reg = <0x17>;
61 #size-cells = <0>;
63 scmi_reg11: regulator@0 {
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/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_hsi.h17 #define FW_ENCODE_32BIT_PATTERN 0x1e1e1e1e
23 #define BNX2X_MAX_ISCSI_TRGT_CONN_MASK 0xFFFF
24 #define BNX2X_MAX_ISCSI_TRGT_CONN_SHIFT 0
25 #define BNX2X_MAX_ISCSI_INIT_CONN_MASK 0xFFFF0000
31 #define BNX2X_MAX_FCOE_TRGT_CONN_MASK 0xFFFF
32 #define BNX2X_MAX_FCOE_TRGT_CONN_SHIFT 0
33 #define BNX2X_MAX_FCOE_INIT_CONN_MASK 0xFFFF0000
42 #define PIN_CFG_NA 0x00000000
43 #define PIN_CFG_GPIO0_P0 0x00000001
44 #define PIN_CFG_GPIO1_P0 0x0000000
[all...]
/linux/arch/arm64/boot/dts/qcom/
H A Dsm8250.dtsi81 #clock-cells = <0>;
89 #clock-cells = <0>;
95 #size-cells = <0>;
97 cpu0: cpu@0 {
100 reg = <0x0 0x0>;
101 clocks = <&cpufreq_hw 0>;
108 qcom,freq-domain = <&cpufreq_hw 0>;
110 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
[all...]
/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw8822c_table.c16 0x83000000, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201F
[all...]