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/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmscc,ocelot.yaml32 - phy-mode = "sgmii": on ports 0, 1, 2, 3, 4, 5, 6, 7
33 - phy-mode = "qsgmii": on ports 0, 1, 2, 3, 4, 5, 6, 7
34 - phy-mode = "1000base-x": on ports 0, 1, 2, 3, 4, 5, 6, 7
41 node bindings, describing it as PF 5 of device 0, bus 0.
45 EA BAR 0) used to access the MAC PCS registers truly belongs to the enetc
51 - phy-mode = "sgmii": on ports 0, 1, 2, 3
52 - phy-mode = "qsgmii": on ports 0, 1, 2, 3
53 - phy-mode = "usxgmii": on ports 0, 1, 2, 3
54 - phy-mode = "1000base-x": on ports 0,
[all...]
/linux/arch/powerpc/boot/dts/
H A Dmpc8308rdb.dts26 #size-cells = <0>;
28 PowerPC,8308@0 {
30 reg = <0x0>;
35 timebase-frequency = <0>; // from bootloader
36 bus-frequency = <0>; // from bootloader
37 clock-frequency = <0>; // from bootloader
43 reg = <0x00000000 0x08000000>; // 128MB at 0
50 reg = <0xe0005000 0x1000>;
51 interrupts = <77 0x8>;
57 ranges = <0x0 0x0 0xfe000000 0x00800000
[all …]
/linux/drivers/net/dsa/xrs700x/
H A Dxrs700x_reg.h4 #define XRS_DEVICE_ID_BASE 0x0
5 #define XRS_GPIO_BASE 0x10000
6 #define XRS_PORT_OFFSET 0x10000
7 #define XRS_PORT_BASE(x) (0x200000 + XRS_PORT_OFFSET * (x))
8 #define XRS_RTC_BASE 0x280000
9 #define XRS_TS_OFFSET 0x8000
10 #define XRS_TS_BASE(x) (0x290000 + XRS_TS_OFFSET * (x))
11 #define XRS_SWITCH_CONF_BASE 0x300000
14 #define XRS_DEV_ID0 (XRS_DEVICE_ID_BASE + 0)
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/linux/arch/arm64/boot/dts/marvell/
H A Darmada-ap80x.dtsi41 reg = <0x0 0x4000000 0x0 0x200000>;
46 reg = <0 0x4400000 0 0x1000000>;
77 ranges = <0x0 0x
[all...]
/linux/sound/soc/codecs/
H A Dcs47l24.c41 { .type = WMFW_ADSP2_PM, .base = 0x200000 },
42 { .type = WMFW_ADSP2_ZM, .base = 0x280000 },
43 { .type = WMFW_ADSP2_XM, .base = 0x290000 },
44 { .type = WMFW_ADSP2_YM, .base = 0x2a8000 },
48 { .type = WMFW_ADSP2_PM, .base = 0x300000 },
49 { .type = WMFW_ADSP2_ZM, .base = 0x380000 },
50 { .type = WMFW_ADSP2_XM, .base = 0x390000 },
51 { .type = WMFW_ADSP2_YM, .base = 0x3a8000 },
68 if (ret != 0) { in cs47l24_adsp_power_ev()
[all...]
H A Dwm5110.c49 { .type = WMFW_ADSP2_PM, .base = 0x100000 },
50 { .type = WMFW_ADSP2_ZM, .base = 0x180000 },
51 { .type = WMFW_ADSP2_XM, .base = 0x190000 },
52 { .type = WMFW_ADSP2_YM, .base = 0x1a8000 },
56 { .type = WMFW_ADSP2_PM, .base = 0x200000 },
57 { .type = WMFW_ADSP2_ZM, .base = 0x280000 },
58 { .type = WMFW_ADSP2_XM, .base = 0x290000 },
59 { .type = WMFW_ADSP2_YM, .base = 0x2a8000 },
63 { .type = WMFW_ADSP2_PM, .base = 0x30000
[all...]
/linux/drivers/soc/tegra/cbb/
H A Dtegra234-cbb.c8 * Error types supported by CBB2.0 are:
27 #define FABRIC_EN_CFG_INTERRUPT_ENABLE_0_0 0x0
28 #define FABRIC_EN_CFG_STATUS_0_0 0x40
29 #define FABRIC_EN_CFG_ADDR_INDEX_0_0 0x60
30 #define FABRIC_EN_CFG_ADDR_LOW_0 0x80
31 #define FABRIC_EN_CFG_ADDR_HI_0 0x84
33 #define FABRIC_EN_CFG_TARGET_NODE_ADDR_INDEX_0_0 0x100
34 #define FABRIC_EN_CFG_TARGET_NODE_ADDR_LOW_0 0x140
35 #define FABRIC_EN_CFG_TARGET_NODE_ADDR_HI_0 0x144
37 #define FABRIC_MN_INITIATOR_ERR_EN_0 0x20
[all...]
/linux/drivers/mfd/
H A Dwm5110-tables.c22 { 0x80, 0x3 },
23 { 0x44, 0x20 },
24 { 0x45, 0x40 },
25 { 0x46, 0x60 },
26 { 0x47, 0x8
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H A Dcs47l24-tables.c21 { 0x80, 0x3 },
22 { 0x27C, 0x0010 },
23 { 0x221, 0x0070 },
24 { 0x80, 0x0 },
36 [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 },
37 [ARIZONA_IRQ_GP1] = { .reg_offset = 0,
[all...]