Searched +full:0 +full:x00074000 (Results 1 – 8 of 8) sorted by relevance
/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra30-asus-tf201.dts | 67 reg = <0x4d>; 82 mount-matrix = "-1", "0", "0", 83 "0", "-1", "0", 84 "0", "0", "-1"; 88 mount-matrix = "0", "-1", "0", 89 "-1", "0", " [all...] |
/linux/Documentation/devicetree/bindings/opp/ |
H A D | opp-v2-kryo-cpu.yaml | 43 '^opp-?[0-9]+$': 58 0: MSM8996, speedbin 0 65 0-3: unused 66 4: MSM8996SG, speedbin 0 72 0: IPQ8062 84 '^opp-microvolt-speed[0-9]+-pvs[0-9]+$': true 97 '^opp-?[0-9]+$': 113 #size-cells = <0>; [all...] |
/linux/drivers/net/ethernet/intel/ice/ |
H A D | ice_hw_autogen.h | 9 #define GLCOMM_QUANTA_PROF(_i) (0x002D2D68 + ((_i) * 4)) 11 #define GLCOMM_QUANTA_PROF_QUANTA_SIZE_S 0 12 #define GLCOMM_QUANTA_PROF_QUANTA_SIZE_M ICE_M(0x3FFF, 0) 14 #define GLCOMM_QUANTA_PROF_MAX_CMD_M ICE_M(0xFF, 16) 16 #define GLCOMM_QUANTA_PROF_MAX_DESC_M ICE_M(0x3F, 24) 17 #define QTX_COMM_DBELL(_DBQM) (0x002C0000 + ((_DBQM) * 4)) 18 #define QTX_COMM_HEAD(_DBQM) (0x000E0000 + ((_DBQM) * 4)) 20 #define QTX_COMM_HEAD_HEAD_S 0 21 #define QTX_COMM_HEAD_HEAD_M ICE_M(0x1FF [all...] |
/linux/arch/arm/boot/dts/ti/omap/ |
H A D | omap5-l4.dtsi | 1 &l4_cfg { /* 0x4a000000 */ 4 clocks = <&l4cfg_clkctrl OMAP5_L4_CFG_CLKCTRL 0>; 6 reg = <0x4a000000 0x800>, 7 <0x4a000800 0x800>, 8 <0x4a001000 0x1000>; 12 ranges = <0x00000000 0x4a00000 [all...] |
H A D | omap4-l4.dtsi | 2 &l4_cfg { /* 0x4a000000 */ 5 clocks = <&l4_cfg_clkctrl OMAP4_L4_CFG_CLKCTRL 0>; 7 reg = <0x4a000000 0x800>, 8 <0x4a000800 0x800>, 9 <0x4a001000 0x1000>; 13 ranges = <0x00000000 0x4a00000 [all...] |
/linux/drivers/net/ethernet/intel/i40e/ |
H A D | i40e_register.h | 11 #define I40E_GL_ATQLEN_ATQCRIT_MASK I40E_MASK(0x1, I40E_GL_ATQLEN_ATQCRIT_SHIFT) 12 #define I40E_PF_ARQBAH 0x00080180 /* Reset: EMPR */ 13 #define I40E_PF_ARQBAL 0x00080080 /* Reset: EMPR */ 14 #define I40E_PF_ARQH 0x00080380 /* Reset: EMPR */ 15 #define I40E_PF_ARQH_ARQH_SHIFT 0 16 #define I40E_PF_ARQH_ARQH_MASK I40E_MASK(0x3FF, I40E_PF_ARQH_ARQH_SHIFT) 17 #define I40E_PF_ARQLEN 0x00080280 /* Reset: EMPR */ 19 #define I40E_PF_ARQLEN_ARQVFE_MASK I40E_MASK(0x1, I40E_PF_ARQLEN_ARQVFE_SHIFT) 21 #define I40E_PF_ARQLEN_ARQOVFL_MASK I40E_MASK(0x1, I40E_PF_ARQLEN_ARQOVFL_SHIFT) 23 #define I40E_PF_ARQLEN_ARQCRIT_MASK I40E_MASK(0x [all...] |
/linux/arch/arm64/boot/dts/qcom/ |
H A D | msm8996.dtsi | 30 #clock-cells = <0>; 37 #clock-cells = <0>; 45 #size-cells = <0>; 47 cpu0: cpu@0 { 50 reg = <0x0 0x0>; 54 clocks = <&kryocc 0>; 69 reg = <0x0 0x1>; 73 clocks = <&kryocc 0>; [all...] |
/linux/drivers/net/wireless/realtek/rtw89/ |
H A D | rtw8852c_table.c | 10 {0xF0FF0000, 0x00000000}, 11 {0xF03300FF, 0x00000001}, 12 {0xF03400FF, 0x00000002}, 13 {0xF03500FF, 0x00000003}, 14 {0xF03600FF, 0x0000000 [all...] |